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2025-10-15 - 17:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot3.osadl.org (updated Wed Oct 15, 2025 12:50:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
254428349,30sleep60-21swapper/607:07:246
3254028249,29sleep50-21swapper/507:05:065
249528268,10sleep20-21swapper/207:06:392
243128247,30sleep30-21swapper/307:05:453
260627743,29sleep00-21swapper/007:08:140
243827743,29sleep10-21swapper/107:05:501
265927643,28sleep40-21swapper/407:08:584
259227541,29sleep70-21swapper/707:08:067
39132500,0sleep30-21swapper/312:13:053
232372480,0sleep00-21swapper/012:06:130
246672470,0sleep40-21swapper/412:39:324
235582470,0sleep20-21swapper/209:30:352
145542470,0sleep30-21swapper/309:42:133
289902420,0sleep20-21swapper/209:49:482
3165993533,1cyclictest0-21swapper/507:10:125
3160992727,0cyclictest0-21swapper/010:59:480
3162992321,1cyclictest0-21swapper/207:10:122
3163992019,1cyclictest401ktimersoftd/312:37:463
3165991912,3cyclictest29239-21nscd12:04:225
3163991910,6cyclictest0-21swapper/310:59:003
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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