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2022-06-27 - 13:51

x86 Intel Xeon i3-1578L v5 @2000 MHz, Linux 4.19.246-rt110 (Profile)

Latency plot of system in rack #5, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot3.osadl.org (updated Mon Jun 27, 2022 00:50:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13482994947,1cyclictest0-21swapper/420:10:164
13498994745,1cyclictest0-21swapper/720:10:167
13475994210,31cyclictest0-21swapper/322:36:273
13457994240,1cyclictest0-21swapper/020:10:160
13475994110,27cyclictest0-21swapper/320:35:193
13475993910,28cyclictest0-21swapper/319:25:173
13482993735,1cyclictest0-21swapper/419:30:124
13475993710,26cyclictest0-21swapper/320:10:203
13492993634,1cyclictest0-21swapper/620:10:166
13475993610,25cyclictest0-21swapper/320:45:203
13475993610,25cyclictest0-21swapper/320:45:013
13475993510,24cyclictest0-21swapper/320:55:003
13475993510,23cyclictest0-21swapper/323:56:393
13498993432,1cyclictest0-21swapper/719:30:127
13469993434,0cyclictest0-21swapper/219:30:172
13465993331,1cyclictest0-21swapper/120:10:161
13475993210,21cyclictest0-21swapper/320:25:113
13486993131,0cyclictest76350irq/125-eth023:56:315
13482993028,1cyclictest0-21swapper/420:55:114
13475993010,17cyclictest0-21swapper/319:10:193
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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