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2024-04-16 - 22:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot3.osadl.org (updated Tue Apr 16, 2024 12:50:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
152329040,45sleep50-21swapper/507:06:185
151028854,29sleep10-21swapper/107:06:061
174727944,31sleep40-21swapper/407:09:224
165327944,30sleep70-21swapper/707:08:047
176527843,30sleep00-21swapper/007:09:340
3203627742,30sleep60-21swapper/607:05:156
157827744,29sleep30-21swapper/307:07:033
3159427642,29sleep20-21swapper/207:05:022
80572500,0sleep50-21swapper/507:15:225
63212460,0sleep70-21swapper/709:25:187
314952440,0sleep60-21swapper/610:53:566
168192440,0sleep50-21swapper/511:22:155
13892440,0sleep00-21swapper/011:13:520
70742430,0sleep40-21swapper/410:02:394
2226991810,4cyclictest0-21swapper/008:45:000
2228991716,1cyclictest321ktimersoftd/207:56:242
2230991615,1cyclictest4283-21ssh10:38:194
2229991615,1cyclictest401ktimersoftd/311:41:373
2229991615,1cyclictest401ktimersoftd/309:00:203
2229991614,1cyclictest11684-21ssh11:56:093
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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