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2025-07-19 - 10:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot3.osadl.org (updated Sat Jul 19, 2025 00:50:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1149828451,29sleep50-21swapper/519:05:305
1162328248,30sleep70-21swapper/719:07:167
1161828246,31sleep20-21swapper/219:07:112
1151028248,29sleep60-21swapper/619:05:396
1165628046,29sleep30-21swapper/319:07:443
1157027945,29sleep10-21swapper/119:06:301
1166227744,29sleep00-21swapper/019:07:490
1158227643,29sleep40-21swapper/419:06:414
49972480,0sleep50-21swapper/522:55:005
12250994747,0cyclictest0-21swapper/421:00:374
27772440,0sleep50-21swapper/521:49:195
266242440,0sleep40-21swapper/400:25:234
237102440,0sleep50-21swapper/522:31:145
122982440,0sleep40-21swapper/421:53:584
245432420,0sleep40-21swapper/423:52:404
147882420,0sleep60-21swapper/600:04:276
95632410,0sleep70-21swapper/722:40:217
12250993028,0cyclictest69450irq/124-eth022:01:574
12250993028,0cyclictest69450irq/124-eth022:01:574
12253992525,0cyclictest0-21swapper/722:57:277
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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