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2026-09-11 - 23:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot3.osadl.org (updated Fri Sep 11, 2026 12:55:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
263929977494,507cyclictest0-21swapper/411:27:414
263959973959,677cyclictest5175-21sshd10:03:247
2639299707112,380cyclictest0-21swapper/410:11:524
263939965213,381cyclictest0-21swapper/512:36:025
263959964911,635cyclictest0-21swapper/710:38:227
263889963685,84cyclictest9-21ksoftirqd/011:04:380
263959962874,381cyclictest0-21swapper/708:30:007
2638899627115,296cyclictest121rcu_preempt12:37:500
2639599626243,380cyclictest21129-1kworker/u17:011:27:457
2639299624284,338cyclictest64450irq/122-eth010:02:154
263959962229,509cyclictest0-21swapper/711:40:297
263959962166,423cyclictest0-21swapper/709:31:307
263959962166,423cyclictest0-21swapper/709:31:307
2638999619108,422cyclictest0-21swapper/112:32:361
263919961718,550cyclictest0-21swapper/309:48:213
263909961017,126cyclictest0-21swapper/210:45:172
263959960494,507cyclictest0-21swapper/709:48:217
263899960293,507cyclictest0-21swapper/109:48:221
263899960292,507cyclictest0-21swapper/111:44:171
263889959751,544cyclictest0-21swapper/009:48:210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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