You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-14 - 00:22
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot4.osadl.org (updated Wed May 13, 2026 12:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
202012119110,6sleep10-21swapper/107:08:451
200352119110,6sleep20-21swapper/207:06:382
20068211864,51sleep30-21swapper/307:07:033
20143210898,7sleep00-21swapper/007:08:000
36122630,1sleep33618-21kthreadcore12:35:163
176052600,1sleep20-21swapper/209:25:172
138612570,2sleep3391ktimersoftd/308:25:193
42212540,0sleep00-21swapper/009:15:180
326342530,0sleep30-21swapper/308:40:263
2047699291,27cyclictest0-21swapper/207:43:212
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional