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2026-10-08 - 20:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot4.osadl.org (updated Thu Oct 08, 2026 12:44:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
6692210770,9sleep20-21swapper/207:06:542
6912210693,6sleep10-21swapper/107:09:461
6685210696,7sleep00-21swapper/007:06:480
6636210595,7sleep30-21swapper/307:06:113
318572740,1sleep231862-21gltestperf08:55:142
180772710,0sleep00-21swapper/009:10:190
233692610,0sleep10-21swapper/110:20:491
74162600,1sleep07421-21kthreadcore12:35:190
150272600,1sleep115033-21kthreadcore12:10:161
96092570,1sleep30-21swapper/309:48:383
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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