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2026-05-21 - 00:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot4.osadl.org (updated Wed May 20, 2026 12:44:03)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13603212565,7sleep00-21swapper/007:08:110
135822125115,7sleep10-21swapper/107:07:561
13439212565,7sleep30-21swapper/307:06:103
136052115104,6sleep20-21swapper/207:08:142
158842630,1sleep00-21swapper/008:05:180
1391099300,29cyclictest0-21swapper/011:00:140
1391999281,26cyclictest0-21swapper/208:57:032
1391999270,26cyclictest0-21swapper/212:28:202
1391999251,23cyclictest0-21swapper/211:44:562
1391999251,19cyclictest0-21swapper/210:15:272
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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