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2026-06-18 - 04:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot4.osadl.org (updated Thu Jun 18, 2026 00:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22455214887,6sleep10-21swapper/119:08:401
22422212664,7sleep00-21swapper/019:08:150
22388212072,7sleep20-21swapper/219:07:492
223072112102,7sleep30-21swapper/319:06:463
152332770,0sleep20-21swapper/221:25:002
280792690,1sleep10-21swapper/100:00:131
114292580,0sleep10-21swapper/122:15:221
192992570,0sleep00-21swapper/021:55:180
67852560,0sleep30-21swapper/319:50:183
132312550,0sleep20-21swapper/222:20:142
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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