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2026-09-24 - 19:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot4.osadl.org (updated Thu Sep 24, 2026 12:44:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2731216595,6sleep00-21swapper/007:07:540
2728212280,9sleep20-21swapper/207:07:522
2761210495,6sleep30-21swapper/307:08:173
2737210394,6sleep10-21swapper/107:07:591
108172840,1sleep310822-21needreboot12:10:243
207562670,0sleep20-21swapper/207:50:172
134842670,1sleep229-21rcuc/207:45:002
185922660,1sleep20-21swapper/210:07:142
319152610,0sleep30-21swapper/310:26:583
148902600,1sleep10-21swapper/111:01:361
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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