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2025-12-05 - 01:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot4.osadl.org (updated Thu Dec 04, 2025 12:44:03)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15729211576,8sleep00-21swapper/007:08:110
155712111101,7sleep30-21swapper/307:06:093
15767210998,7sleep10-21swapper/107:08:401
15570210797,7sleep20-21swapper/207:06:082
326682700,0sleep30-21swapper/309:25:343
69622670,1sleep06967-21gltestperf11:30:160
215692650,0sleep00-21swapper/009:39:530
165312610,0sleep30-21swapper/307:10:133
241172560,0sleep00-21swapper/007:15:030
10802540,1sleep01085-21kthreadcore12:30:220
213002530,0sleep30-21swapper/308:30:233
167052380,0sleep30-21swapper/309:18:563
1604699281,26cyclictest0-21swapper/111:17:551
1604699280,27cyclictest0-21swapper/107:23:371
1604699280,11cyclictest0-21swapper/112:00:001
1604499280,27cyclictest0-21swapper/007:13:510
16050992723,3cyclictest0-21swapper/212:25:572
1605099270,26cyclictest0-21swapper/210:31:102
16046992714,5cyclictest0-21swapper/111:49:261
1604699270,26cyclictest0-21swapper/111:54:351
1604699270,26cyclictest0-21swapper/111:25:431
1604699270,26cyclictest0-21swapper/110:15:451
1604699270,26cyclictest0-21swapper/109:43:121
1604699270,26cyclictest0-21swapper/109:43:121
1604699270,26cyclictest0-21swapper/109:07:471
1604699270,26cyclictest0-21swapper/109:04:171
1604699270,26cyclictest0-21swapper/108:21:251
1604699270,26cyclictest0-21swapper/108:15:051
1604699270,26cyclictest0-21swapper/107:47:261
1604699270,26cyclictest0-21swapper/107:29:351
1604699270,26cyclictest0-21swapper/107:16:261
1605099260,25cyclictest0-21swapper/212:24:212
1605099260,25cyclictest0-21swapper/209:40:452
1605099260,25cyclictest0-21swapper/209:40:452
1605099260,25cyclictest0-21swapper/209:12:212
16046992617,6cyclictest25862-21ssh11:21:551
1604699260,25cyclictest0-21swapper/109:46:121
1604699260,25cyclictest0-21swapper/107:56:071
1604699260,25cyclictest0-21swapper/107:44:051
1605099250,24cyclictest0-21swapper/211:48:242
1605099250,24cyclictest0-21swapper/211:29:462
1605099250,24cyclictest0-21swapper/210:09:512
1604699251,11cyclictest0-21swapper/112:35:151
1604699250,24cyclictest0-21swapper/111:05:101
1604699250,24cyclictest0-21swapper/110:21:271
1604699250,24cyclictest0-21swapper/108:59:171
1604699250,1cyclictest0-21swapper/112:23:441
1604699250,15cyclictest16309-21kworker/1:210:02:301
1605099247,16cyclictest0-21swapper/210:25:342
16050992422,2cyclictest0-21swapper/209:23:062
1605099242,21cyclictest0-21swapper/210:51:292
1605099240,2cyclictest0-21swapper/209:54:282
1605099240,23cyclictest0-21swapper/210:20:412
1605099240,23cyclictest0-21swapper/207:49:242
16046992417,6cyclictest32157-21cat09:10:181
16046992413,10cyclictest0-21swapper/110:35:081
1604699240,1cyclictest0-21swapper/112:18:191
1604699240,19cyclictest0-21swapper/110:50:071
1604699240,10cyclictest30874-21ssh11:57:391
1604699240,10cyclictest0-21swapper/109:30:181
1604499242,18cyclictest30712-21ssh11:08:230
1604499240,18cyclictest0-21swapper/010:50:050
1605099232,20cyclictest0-21swapper/212:14:142
1605099232,20cyclictest0-21swapper/212:02:152
1605099232,20cyclictest0-21swapper/210:39:402
1605099232,20cyclictest0-21swapper/209:35:402
16050992315,6cyclictest0-21swapper/209:33:132
1605099231,21cyclictest0-21swapper/211:04:102
1605099231,21cyclictest0-21swapper/210:15:172
1605099231,21cyclictest0-21swapper/209:15:412
1605099231,10cyclictest0-21swapper/211:40:592
1605099230,22cyclictest0-21swapper/211:35:192
1605099230,22cyclictest0-21swapper/209:58:282
1605099230,17cyclictest0-21swapper/210:47:222
1605099230,17cyclictest0-21swapper/210:11:352
1604699231,3cyclictest0-21swapper/108:48:171
1604699231,21cyclictest0-21swapper/108:01:351
1604699230,22cyclictest0-21swapper/110:59:051
1604699230,22cyclictest0-21swapper/109:35:421
1604699230,22cyclictest0-21swapper/109:23:371
1604699230,20cyclictest0-21swapper/111:30:251
1604699230,17cyclictest0-21swapper/109:25:411
1604699230,16cyclictest0-21swapper/112:10:291
1604699230,16cyclictest0-21swapper/111:11:121
1604699230,10cyclictest19276-21diskstats12:25:161
1604699230,10cyclictest15468-21ssh09:52:221
1604499230,22cyclictest0-21swapper/010:34:420
1605099222,19cyclictest0-21swapper/212:38:352
1605099222,19cyclictest0-21swapper/211:17:262
1605099221,20cyclictest0-21swapper/211:53:302
1605099220,21cyclictest0-21swapper/212:33:312
1605099220,21cyclictest0-21swapper/212:17:072
1605099220,21cyclictest0-21swapper/211:32:182
1605099220,21cyclictest0-21swapper/211:23:532
1605099220,21cyclictest0-21swapper/209:45:312
1605099220,21cyclictest0-21swapper/208:50:532
1605099220,20cyclictest0-21swapper/211:55:412
1605099220,20cyclictest0-21swapper/210:43:502
1604699229,12cyclictest0-21swapper/110:07:481
1604699226,13cyclictest0-21swapper/110:28:251
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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