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2025-11-24 - 05:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot4.osadl.org (updated Mon Nov 24, 2025 00:44:03)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
32227212866,7sleep10-21swapper/119:09:051
32149212364,6sleep00-21swapper/019:08:030
32059210898,7sleep20-21swapper/219:06:542
3207029785,8sleep30-21swapper/319:07:033
259062930,0sleep025905-21/usr/sbin/munin23:00:130
116572700,0sleep30-21swapper/321:37:253
25202670,0sleep30-21swapper/323:34:203
226112640,1sleep30-21swapper/323:58:483
182322640,0sleep00-21swapper/019:20:200
184782620,0sleep20-21swapper/223:10:212
195692610,0sleep20-21swapper/220:15:252
18262600,0sleep30-21swapper/323:49:083
28952590,1sleep10-21swapper/121:19:521
142212580,0sleep03-21ksoftirqd/022:09:300
212212570,0sleep20-21swapper/221:41:112
83812550,1sleep30-21swapper/322:35:213
183242550,0sleep10-21swapper/121:25:201
3245799294,18cyclictest0-21swapper/023:45:130
559922815,3sleep30-21swapper/319:11:553
3245799280,17cyclictest0-21swapper/023:22:180
3246699270,26cyclictest0-21swapper/222:10:132
3246699270,26cyclictest0-21swapper/221:30:092
3246699270,26cyclictest0-21swapper/219:20:582
32459992723,3cyclictest0-21swapper/100:30:381
3245999270,26cyclictest0-21swapper/121:23:391
3245999270,26cyclictest0-21swapper/121:08:351
3245999270,26cyclictest0-21swapper/119:46:501
3245799270,26cyclictest0-21swapper/022:23:330
32466992622,3cyclictest0-21swapper/223:06:482
32466992622,3cyclictest0-21swapper/221:23:032
32466992622,3cyclictest0-21swapper/200:19:592
3246699260,25cyclictest0-21swapper/223:23:432
3246699260,25cyclictest0-21swapper/219:41:342
3245999260,25cyclictest0-21swapper/122:06:541
3245999260,25cyclictest0-21swapper/120:32:141
3245999260,25cyclictest0-21swapper/119:54:461
3245999260,25cyclictest0-21swapper/100:09:071
32457992617,3cyclictest0-21swapper/000:12:590
248892260,1sleep3391ktimersoftd/323:30:013
3246699250,24cyclictest10448-21ssh00:23:192
32459992523,2cyclictest0-21swapper/119:23:461
32459992522,2cyclictest0-21swapper/123:55:531
32459992521,3cyclictest0-21swapper/122:55:161
3245999250,24cyclictest0-21swapper/122:10:211
3245999250,24cyclictest0-21swapper/121:12:131
3245999250,24cyclictest0-21swapper/120:15:021
3245999250,24cyclictest0-21swapper/120:00:471
3245999250,24cyclictest0-21swapper/120:00:461
3246699242,20cyclictest0-21swapper/200:37:302
32466992417,6cyclictest0-21swapper/223:01:462
3246699240,23cyclictest0-21swapper/222:35:222
3246699240,18cyclictest0-21swapper/222:07:452
32459992422,2cyclictest0-21swapper/119:16:191
32459992421,3cyclictest0-21swapper/123:43:231
32459992420,3cyclictest0-21swapper/121:34:451
3245999240,23cyclictest0-21swapper/123:26:471
3245999240,23cyclictest0-21swapper/123:23:061
3245999240,23cyclictest0-21swapper/123:13:071
3245999240,23cyclictest0-21swapper/122:29:061
3245999240,23cyclictest0-21swapper/122:22:091
3245999240,23cyclictest0-21swapper/121:50:081
3245999240,23cyclictest0-21swapper/121:39:371
3245999240,23cyclictest0-21swapper/100:16:331
3245999240,18cyclictest0-21swapper/123:31:551
3245799240,23cyclictest0-21swapper/000:17:070
3245799240,23cyclictest0-21swapper/000:07:160
3246699232,20cyclictest0-21swapper/222:28:212
3246699232,20cyclictest0-21swapper/200:12:482
32466992319,3cyclictest0-21swapper/200:25:262
3246699231,3cyclictest0-21swapper/223:52:502
3246699231,21cyclictest0-21swapper/222:57:162
3246699230,4cyclictest0-21swapper/223:30:042
3246699230,22cyclictest0-21swapper/223:35:222
3246699230,22cyclictest0-21swapper/222:34:372
3246699230,18cyclictest0-21swapper/200:01:442
32459992321,2cyclictest0-21swapper/119:36:591
32459992314,8cyclictest0-21swapper/121:58:111
3245999230,23cyclictest0-21swapper/120:50:111
3245999230,23cyclictest0-21swapper/119:58:221
3245999230,22cyclictest0-21swapper/123:50:011
3245999230,22cyclictest0-21swapper/123:17:351
3245999230,22cyclictest0-21swapper/123:17:351
3245999230,22cyclictest0-21swapper/123:01:091
3245999230,22cyclictest0-21swapper/122:33:421
3245999230,22cyclictest0-21swapper/122:15:021
3245999230,22cyclictest0-21swapper/122:04:571
3245999230,22cyclictest0-21swapper/119:12:011
3245999230,22cyclictest0-21swapper/100:20:411
3245999230,22cyclictest0-21swapper/100:03:111
3245999230,18cyclictest0-21swapper/121:48:331
3245999230,17cyclictest0-21swapper/123:36:481
3245999230,17cyclictest0-21swapper/100:29:371
3245999230,17cyclictest0-21swapper/100:10:551
3245799232,20cyclictest0-21swapper/023:56:100
32457992316,6cyclictest0-21swapper/023:25:370
3245799230,22cyclictest0-21swapper/022:35:020
3245799230,22cyclictest0-21swapper/022:31:230
3245799230,22cyclictest0-21swapper/022:26:560
3245799230,22cyclictest0-21swapper/022:02:260
3245799230,17cyclictest0-21swapper/023:35:450
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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