You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-14 - 04:38
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot4.osadl.org (updated Wed Jan 14, 2026 00:44:03)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19382214162,8sleep00-21swapper/019:07:400
19207211956,7sleep10-21swapper/119:05:251
19396210896,7sleep20-21swapper/219:07:502
19484210595,7sleep30-21swapper/319:08:593
256092610,0sleep30-21swapper/320:10:143
79132570,0sleep30-21swapper/300:10:173
35842540,0sleep20-21swapper/221:45:172
35842540,0sleep20-21swapper/221:45:162
19735992913,15cyclictest0-21swapper/123:20:111
1973599280,27cyclictest0-21swapper/121:13:541
1973599280,27cyclictest0-21swapper/119:18:021
1973599270,26cyclictest0-21swapper/123:55:101
1973599270,26cyclictest0-21swapper/123:39:281
1973599270,26cyclictest0-21swapper/123:30:341
1973599270,26cyclictest0-21swapper/123:26:401
1973599270,26cyclictest0-21swapper/123:18:401
1973599270,26cyclictest0-21swapper/122:56:241
1973599270,26cyclictest0-21swapper/122:51:571
1973599270,26cyclictest0-21swapper/122:49:221
1973599270,26cyclictest0-21swapper/121:56:031
1973599270,26cyclictest0-21swapper/121:46:591
1973599270,26cyclictest0-21swapper/121:46:591
1973599270,26cyclictest0-21swapper/121:39:381
1973599270,26cyclictest0-21swapper/121:27:241
1973599270,26cyclictest0-21swapper/121:22:201
1973599270,26cyclictest0-21swapper/121:03:541
1973599270,26cyclictest0-21swapper/120:46:031
1973599270,26cyclictest0-21swapper/120:37:181
1973599270,26cyclictest0-21swapper/119:57:021
1973599270,26cyclictest0-21swapper/119:42:561
1973599270,26cyclictest0-21swapper/119:37:141
1973599270,26cyclictest0-21swapper/119:22:261
1973599270,26cyclictest0-21swapper/100:31:051
1973599270,26cyclictest0-21swapper/100:21:491
19739992622,2cyclictest22639-21awk21:05:012
1973999260,25cyclictest0-21swapper/223:22:252
1973599260,25cyclictest0-21swapper/123:45:371
1973599260,25cyclictest0-21swapper/123:08:011
1973599260,25cyclictest0-21swapper/122:43:451
1973599260,25cyclictest0-21swapper/122:29:121
1973599260,25cyclictest0-21swapper/122:19:541
1973599260,25cyclictest0-21swapper/122:01:511
1973599260,25cyclictest0-21swapper/121:54:041
1973599260,25cyclictest0-21swapper/121:41:481
1973599260,25cyclictest0-21swapper/121:31:021
1973599260,25cyclictest0-21swapper/121:15:511
1973599260,25cyclictest0-21swapper/120:57:481
1973599260,25cyclictest0-21swapper/120:54:421
1973599260,25cyclictest0-21swapper/120:40:411
1973599260,25cyclictest0-21swapper/120:31:021
1973599260,25cyclictest0-21swapper/120:20:081
1973599260,25cyclictest0-21swapper/120:16:381
1973599260,25cyclictest0-21swapper/120:01:141
1973599260,25cyclictest0-21swapper/100:11:071
19735992522,3cyclictest0-21swapper/121:05:591
1973599250,24cyclictest0-21swapper/100:05:031
1973199250,24cyclictest0-21swapper/020:50:110
19739992421,3cyclictest0-21swapper/200:15:022
19739992421,2cyclictest0-21swapper/221:25:182
1973999241,21cyclictest0-21swapper/200:00:162
19735992422,2cyclictest0-21swapper/123:13:431
19735992422,2cyclictest0-21swapper/122:07:281
19735992422,2cyclictest0-21swapper/100:38:101
19735992321,2cyclictest0-21swapper/122:24:361
19735992321,2cyclictest0-21swapper/120:27:041
19735992320,2cyclictest0-21swapper/120:14:051
1973199230,17cyclictest0-21swapper/022:15:170
19739992220,2cyclictest0-21swapper/223:51:312
19739992219,3cyclictest0-21swapper/219:50:382
1973999220,3cyclictest0-21swapper/221:52:282
1973999220,21cyclictest0-21swapper/222:58:092
1973999220,21cyclictest0-21swapper/222:32:122
1973999220,21cyclictest0-21swapper/200:14:552
19735992218,3cyclictest0-21swapper/119:51:441
19735992218,3cyclictest0-21swapper/100:27:561
1973599220,21cyclictest0-21swapper/123:40:211
1973599220,21cyclictest0-21swapper/120:07:471
1973599220,21cyclictest0-21swapper/119:12:501
19731992210,2cyclictest0-21swapper/020:10:160
1973199220,21cyclictest0-21swapper/022:54:010
1973199220,21cyclictest0-21swapper/022:37:060
1973999217,8cyclictest0-21swapper/221:20:212
19739992118,3cyclictest0-21swapper/220:06:082
19739992118,2cyclictest750-21snmpd23:16:012
19739992118,2cyclictest750-21snmpd20:40:322
19739992117,3cyclictest0-21swapper/223:38:312
19739992117,3cyclictest0-21swapper/221:43:422
19739992117,3cyclictest0-21swapper/221:33:542
1973999211,19cyclictest0-21swapper/220:30:112
1973999210,3cyclictest0-21swapper/220:29:502
1973999210,3cyclictest0-21swapper/200:33:202
1973999210,2cyclictest20832-21awk00:25:002
1973999210,20cyclictest0-21swapper/222:42:272
1973999210,20cyclictest0-21swapper/222:01:422
1973999210,20cyclictest0-21swapper/221:37:172
1973999210,20cyclictest0-21swapper/219:10:132
1973999210,20cyclictest0-21swapper/200:06:222
19735992117,3cyclictest0-21swapper/100:17:081
1973599210,3cyclictest0-21swapper/119:31:381
1973599210,20cyclictest0-21swapper/123:03:091
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional