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2025-11-16 - 07:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot4.osadl.org (updated Sun Nov 16, 2025 00:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
10965212463,7sleep30-21swapper/319:06:053
10973211075,7sleep10-21swapper/119:06:101
10987210999,7sleep00-21swapper/019:06:210
11247210898,7sleep20-21swapper/219:09:452
144752660,0sleep20-21swapper/221:50:202
194002620,1sleep319403-21kthreadcore19:15:023
69202590,0sleep30-21swapper/322:16:053
240332580,1sleep20-21swapper/223:58:542
42832570,1sleep24286-21kthreadcore19:55:222
22982570,1sleep30-21swapper/320:50:133
309452550,1sleep229-21rcuc/223:30:182
129682550,0sleep10-21swapper/123:36:421
177592540,0sleep10-21swapper/122:53:161
1142999270,26cyclictest0-21swapper/123:33:221
1142999270,26cyclictest0-21swapper/122:27:391
1142999270,26cyclictest0-21swapper/120:47:371
1142999270,25cyclictest28490-21idleruntime-cro20:44:591
1142799270,26cyclictest0-21swapper/022:28:240
11437992618,7cyclictest0-21swapper/200:13:012
1142999260,25cyclictest0-21swapper/122:32:121
1142999260,25cyclictest0-21swapper/120:24:131
1142999260,25cyclictest0-21swapper/119:55:371
1142999260,25cyclictest0-21swapper/119:28:141
1142999260,25cyclictest0-21swapper/119:22:181
1142999260,25cyclictest0-21swapper/119:11:271
1142999260,25cyclictest0-21swapper/100:09:491
1142799260,25cyclictest0-21swapper/019:30:490
1143799253,21cyclictest0-21swapper/200:08:322
1143799251,23cyclictest0-21swapper/222:19:272
11429992523,2cyclictest0-21swapper/123:19:271
11429992517,7cyclictest0-21swapper/122:24:391
1142999250,24cyclictest0-21swapper/120:58:251
1142999250,24cyclictest0-21swapper/100:34:081
1142999250,24cyclictest0-21swapper/100:21:291
1142799251,18cyclictest0-21swapper/021:40:210
1142799250,24cyclictest0-21swapper/022:11:270
1142799250,24cyclictest0-21swapper/021:39:360
11437992420,2cyclictest2058-21latency_hist19:55:002
1143799240,17cyclictest0-21swapper/220:50:132
11429992423,1cyclictest0-21swapper/121:46:561
11429992422,2cyclictest0-21swapper/123:59:021
11429992417,7cyclictest0-21swapper/123:25:491
11429992415,8cyclictest0-21swapper/122:56:421
1142999240,23cyclictest0-21swapper/123:03:581
1142999240,18cyclictest0-21swapper/123:49:461
1142999240,18cyclictest0-21swapper/123:11:171
1142799246,17cyclictest0-21swapper/022:45:420
1142799240,23cyclictest0-21swapper/022:23:400
1142799240,23cyclictest0-21swapper/021:53:570
1142799240,23cyclictest0-21swapper/021:22:160
2525622319,3sleep30-21swapper/320:11:103
1143799232,20cyclictest0-21swapper/222:53:012
11437992316,6cyclictest0-21swapper/223:05:312
1143799230,22cyclictest0-21swapper/222:38:532
1143799230,22cyclictest0-21swapper/219:33:102
1143799230,1cyclictest0-21swapper/221:35:292
1143799230,17cyclictest0-21swapper/222:57:332
11429992316,7cyclictest0-21swapper/123:22:051
1142999230,22cyclictest0-21swapper/123:08:091
1142999230,22cyclictest0-21swapper/122:16:061
1142999230,22cyclictest0-21swapper/122:10:261
1142999230,22cyclictest0-21swapper/122:05:031
1142999230,22cyclictest0-21swapper/122:03:531
1142999230,22cyclictest0-21swapper/121:58:361
1142999230,22cyclictest0-21swapper/121:50:431
1142999230,22cyclictest0-21swapper/121:38:281
1142999230,22cyclictest0-21swapper/121:31:341
1142999230,22cyclictest0-21swapper/100:27:411
1142999230,22cyclictest0-21swapper/100:15:011
1142999230,22cyclictest0-21swapper/100:11:231
1142999230,17cyclictest0-21swapper/100:00:301
1142799232,20cyclictest0-21swapper/023:50:540
1142799231,20cyclictest7270-21kworker/0:023:18:130
1142799230,22cyclictest0-21swapper/023:48:460
1142799230,22cyclictest0-21swapper/023:40:340
1142799230,22cyclictest0-21swapper/023:40:340
1142799230,22cyclictest0-21swapper/023:32:460
1142799230,22cyclictest0-21swapper/023:12:200
1142799230,22cyclictest0-21swapper/023:08:400
1142799230,22cyclictest0-21swapper/000:13:380
1142799230,22cyclictest0-21swapper/000:01:090
1143799222,19cyclictest0-21swapper/223:26:022
1143799222,19cyclictest0-21swapper/222:12:012
11437992214,6cyclictest0-21swapper/200:33:402
1143799221,20cyclictest0-21swapper/223:44:492
1143799221,20cyclictest0-21swapper/223:44:492
1143799221,20cyclictest0-21swapper/223:10:172
1143799221,20cyclictest0-21swapper/222:27:112
1143799220,4cyclictest0-21swapper/200:35:502
1143799220,3cyclictest0-21swapper/223:54:462
1143799220,21cyclictest0-21swapper/223:47:472
1143799220,21cyclictest0-21swapper/222:41:542
1143799220,21cyclictest0-21swapper/222:07:592
1143799220,21cyclictest0-21swapper/221:32:332
1143799220,21cyclictest0-21swapper/221:21:562
1143799220,21cyclictest0-21swapper/221:11:062
1143799220,21cyclictest0-21swapper/219:35:402
1143799220,21cyclictest0-21swapper/200:25:502
1143799220,20cyclictest7660-21ssh23:04:572
1143799220,16cyclictest0-21swapper/223:21:262
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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