You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-11 - 22:07
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Tue Aug 11, 2026 13:02:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2675993001,296cyclictest0-21swapper/2211:20:1415
2675993001,296cyclictest0-21swapper/2211:20:1415
2675993001,296cyclictest0-21swapper/2211:20:1415
2675992711,259cyclictest0-21swapper/2212:30:1515
2675992711,259cyclictest0-21swapper/2212:30:1415
2675992532,245cyclictest37358-21CPU15
2675992532,245cyclictest37358-21CPU15
2675992491,2cyclictest0-21swapper/2212:12:2115
2675992491,2cyclictest0-21swapper/2212:12:2115
2675992491,2cyclictest0-21swapper/2212:12:2115
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional