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2025-12-23 - 14:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Tue Dec 23, 2025 01:00:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2536499216206,5cyclictest3610-21CPU3
2536499216206,5cyclictest3610-21CPU3
2536599214159,52cyclictest2447-21CPU4
2536599214159,52cyclictest2447-21CPU4
2539699207154,46cyclictest3546-21CPU32
2539699207154,46cyclictest3546-21CPU32
2537799206201,2cyclictest0-21swapper/2321:45:2016
2537799206201,2cyclictest0-21swapper/2321:45:2016
2537799206201,2cyclictest0-21swapper/2321:45:2016
2536499206196,8cyclictest0-21swapper/1122:01:573
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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