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2025-11-24 - 12:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Mon Nov 24, 2025 01:01:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
154599262233,13cyclictest15978-21CPU18
154599262233,13cyclictest15978-21CPU18
154599256224,12cyclictest38025-21NetworkChangeNo20:05:1918
154599256224,12cyclictest38025-21NetworkChangeNo20:05:1918
154599238206,12cyclictest8424-21inotify_reader22:55:1918
154599238206,12cyclictest8424-21inotify_reader22:55:1918
154599234202,21cyclictest33730-21inotify_reader19:20:2018
154599234202,21cyclictest33730-21inotify_reader19:20:2018
154499230221,5cyclictest15984-21CPU17
154499230221,5cyclictest15984-21CPU17
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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