You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-10 - 09:23
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Tue Mar 10, 2026 01:02:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2344199216208,6cyclictest0-21swapper/1321:36:595
2344199216208,6cyclictest0-21swapper/1321:36:595
2344199204187,5cyclictest15884-21grep21:30:125
2344199204187,5cyclictest15884-21grep21:30:125
2346799202188,12cyclictest0-21swapper/3621:18:0230
2346799202188,12cyclictest0-21swapper/3621:18:0230
2346799202188,12cyclictest0-21swapper/3621:18:0230
2343999201177,23cyclictest0-21swapper/1123:15:533
2343999201177,23cyclictest0-21swapper/1123:15:533
2346299198191,5cyclictest0-21swapper/3123:25:1725
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional