You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-02 - 22:02
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Thu Jul 02, 2026 13:02:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1395699219209,7cyclictest0-21swapper/3711:38:3231
1395699219209,7cyclictest0-21swapper/3711:38:3231
1395699219209,7cyclictest0-21swapper/3711:38:3131
1391699211203,5cyclictest0-21swapper/512:09:2935
1391699211203,5cyclictest0-21swapper/512:09:2835
1395699210201,6cyclictest0-21swapper/3709:40:1531
1395699210201,6cyclictest0-21swapper/3709:40:1531
1395699210201,6cyclictest0-21swapper/3709:40:1431
1394299209201,4cyclictest4408-21CPU19
1394299209201,4cyclictest4408-21CPU19
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional