You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-06-03 - 10:39
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Wed Jun 03, 2026 01:01:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2446499200175,22cyclictest0-21swapper/3222:19:5626
2446499200175,22cyclictest0-21swapper/3222:19:5626
24453992001,4cyclictest2461-21CPU16
24453992001,4cyclictest2461-21CPU16
24453992001,4cyclictest2461-21CPU16
2446499194188,4cyclictest0-21swapper/3221:38:5426
2446499194188,4cyclictest0-21swapper/3221:38:5426
244269919412,178cyclictest0-21swapper/120:25:191
244269919412,178cyclictest0-21swapper/120:25:181
2447199192176,11cyclictest0-21swapper/3900:16:4033
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional