You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-25 - 04:27
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Sat Jul 25, 2026 01:01:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
40588992551,2cyclictest0-21swapper/3121:30:1725
40588992551,2cyclictest0-21swapper/3121:30:1625
40588992435,222cyclictest2466-21CPU25
40588992435,222cyclictest2466-21CPU25
40588992401,2cyclictest0-21swapper/3123:41:0925
40588992401,2cyclictest0-21swapper/3123:41:0925
40588992391,3cyclictest0-21swapper/3123:18:3225
40588992391,3cyclictest0-21swapper/3123:18:3125
40588992381,2cyclictest0-21swapper/3122:00:1225
40588992381,2cyclictest0-21swapper/3122:00:1225
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional