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2026-07-14 - 14:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Tue Jul 14, 2026 13:03:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
663399286272,12cyclictest372-21kswapd010:35:3034
663399286272,12cyclictest372-21kswapd010:35:2934
667599283273,7cyclictest3341rcuc/3910:35:3033
667599283273,7cyclictest3341rcuc/3910:35:3033
664699230225,3cyclictest19916-21as10:35:318
664699230225,3cyclictest19916-21as10:35:308
665799218209,4cyclictest2461-21CPU18
665799218209,4cyclictest2461-21CPU18
665199215154,58cyclictest3609-21CPU13
665199215154,58cyclictest3609-21CPU13
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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