You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-06 - 13:10
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Thu Aug 06, 2026 01:01:16)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
894299261258,2cyclictest0-21swapper/2623:20:2119
894299261258,2cyclictest0-21swapper/2623:20:2119
894299261258,2cyclictest0-21swapper/2623:20:2119
895799246233,10cyclictest755-21systemd-journal23:05:1532
895799246233,10cyclictest755-21systemd-journal23:05:1532
895799246233,10cyclictest755-21systemd-journal23:05:1432
893799244239,3cyclictest0-21swapper/2223:05:1115
893799244239,3cyclictest0-21swapper/2223:05:1015
893799244239,3cyclictest0-21swapper/2223:05:1015
895799235229,4cyclictest0-21swapper/3822:20:0432
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional