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2026-07-22 - 15:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Wed Jul 22, 2026 13:01:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31116992620,3cyclictest17482-21nfsd11:11:1524
31116992620,3cyclictest17482-21nfsd11:11:1524
31116992620,3cyclictest17482-21nfsd11:11:1424
31116992491,3cyclictest35963-21grep10:10:1224
31116992491,3cyclictest35963-21grep10:10:1124
31116992421,2cyclictest0-21swapper/3010:52:2324
31116992421,2cyclictest0-21swapper/3010:52:2324
31116992421,2cyclictest0-21swapper/3010:52:2224
31116992381,233cyclictest0-21swapper/3011:20:0324
31116992381,233cyclictest0-21swapper/3011:20:0324
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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