You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-30 - 12:13
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Tue Dec 30, 2025 01:00:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3803199229208,18cyclictest0-21swapper/2623:55:1919
3803199229208,18cyclictest0-21swapper/2623:55:1819
3803199229208,18cyclictest0-21swapper/2623:55:1819
3804399226219,4cyclictest37357-21CPU30
3804399226219,4cyclictest37357-21CPU30
3804399226219,4cyclictest37357-21CPU30
3803199224212,8cyclictest37267-21CPU19
3803199224212,8cyclictest37267-21CPU19
3802199224216,6cyclictest0-21swapper/1700:30:159
3802199224216,6cyclictest0-21swapper/1700:30:159
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional