You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-12 - 02:40
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Mon Jan 12, 2026 01:00:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1882399214193,19cyclictest0-21swapper/2123:31:3014
1882399214193,19cyclictest0-21swapper/2123:31:3014
1882399213205,5cyclictest0-21swapper/2122:47:1414
1882399213205,5cyclictest0-21swapper/2122:47:1414
1882399213205,5cyclictest0-21swapper/2122:47:1414
1881999210206,2cyclictest0-21swapper/1822:20:1410
1881999210206,2cyclictest0-21swapper/1822:20:1410
1881999210206,2cyclictest0-21swapper/1822:20:1410
1882499208105,74cyclictest3544-21CPU15
1882499208105,74cyclictest3544-21CPU15
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional