You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-06-01 - 07:37
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Mon Jun 01, 2026 01:02:20)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2858499233223,8cyclictest0-21swapper/519:40:2135
2858499233223,8cyclictest0-21swapper/519:40:2135
2861699223220,2cyclictest0-21swapper/3422:25:1628
2861699223220,2cyclictest0-21swapper/3422:25:1528
2858299222217,3cyclictest0-21swapper/321:40:0623
2858299222217,3cyclictest0-21swapper/321:40:0623
2858299213202,9cyclictest0-21swapper/321:33:0323
2858299213202,9cyclictest0-21swapper/321:33:0223
2858499212152,56cyclictest0-21swapper/521:30:0135
2858499212152,56cyclictest0-21swapper/521:30:0135
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional