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2026-01-05 - 11:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Mon Jan 05, 2026 01:01:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
8882992032,8cyclictest3542-21CPU27
8882992032,8cyclictest3542-21CPU27
8882992032,8cyclictest3542-21CPU27
888499200194,3cyclictest0-21swapper/3523:51:0729
888499200194,3cyclictest0-21swapper/3523:51:0729
888499200194,3cyclictest0-21swapper/3523:51:0629
886899200100,84cyclictest3542-21CPU13
886899200100,84cyclictest3542-21CPU13
886899200100,84cyclictest3542-21CPU13
886899197123,13cyclictest0-21swapper/2021:05:1613
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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