You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-22 - 22:02
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Sat Aug 22, 2026 13:02:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2612599191186,3cyclictest11261-21kworker/u81:4+events_unbound09:21:5019
2612599191186,3cyclictest11261-21kworker/u81:4+events_unbound09:21:5019
2613599189129,50cyclictest0-21swapper/3310:01:2727
2613599189129,50cyclictest0-21swapper/3310:01:2727
2613599189129,50cyclictest0-21swapper/3310:01:2627
2612799189175,10cyclictest0-21swapper/2811:01:4021
2612799189175,10cyclictest0-21swapper/2811:01:4021
2609999189178,8cyclictest0-21swapper/307:45:4323
2609999187181,4cyclictest0-21swapper/310:12:4123
2609999187181,4cyclictest0-21swapper/310:12:4123
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional