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2025-12-25 - 03:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Thu Dec 25, 2025 01:00:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3781699212209,2cyclictest0-21swapper/821:39:3938
3781699212209,2cyclictest0-21swapper/821:39:3938
3781699212209,2cyclictest0-21swapper/821:39:3838
3781999207201,3cyclictest38529-21apt-get22:30:143
3781999207201,3cyclictest38529-21apt-get22:30:143
3781999207201,3cyclictest38529-21apt-get22:30:143
3781999204182,12cyclictest0-21swapper/1121:55:443
3781999204182,12cyclictest0-21swapper/1121:55:443
3781999204182,12cyclictest0-21swapper/1121:55:433
3784199202194,6cyclictest0-21swapper/2919:18:2322
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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