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2025-12-01 - 05:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Mon Dec 01, 2025 01:01:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
336399243217,11cyclictest0-21swapper/3222:25:2026
336399243217,11cyclictest0-21swapper/3222:25:2026
333999231199,13cyclictest14560-21NetworkChangeNo23:05:213
333999231199,13cyclictest14560-21NetworkChangeNo23:05:213
333999231199,13cyclictest14560-21NetworkChangeNo23:05:213
3349992286,211cyclictest0-21swapper/1923:05:2011
3349992286,211cyclictest0-21swapper/1923:05:2011
3349992286,211cyclictest0-21swapper/1923:05:2011
33369921968,137cyclictest0-21swapper/921:05:2039
33369921968,137cyclictest0-21swapper/921:05:2039
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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