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2025-11-20 - 13:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Thu Nov 20, 2025 01:02:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3255699290283,4cyclictest15978-21CPU26
3255699290283,4cyclictest15978-21CPU26
3255699290283,4cyclictest15978-21CPU26
32522992234,208cyclictest37156-21inotify_reader20:55:157
3256299220217,2cyclictest0-21swapper/3721:06:2431
3256299220217,2cyclictest0-21swapper/3721:06:2431
3256299220217,2cyclictest0-21swapper/3721:06:2331
3254599218213,3cyclictest0-21swapper/2820:30:2521
3254599218213,3cyclictest0-21swapper/2820:30:2521
3255699217208,5cyclictest15833-21rm23:10:2026
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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