You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-21 - 13:21
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot0.osadl.org (updated Tue Apr 21, 2026 01:01:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2228599218214,2cyclictest0-21swapper/2520:10:1218
2228599218214,2cyclictest0-21swapper/2520:10:1218
2229499212206,4cyclictest0-21swapper/3223:23:0826
2229499212206,4cyclictest0-21swapper/3223:23:0726
2225999207201,4cyclictest0-21swapper/420:50:2734
2225999207201,4cyclictest0-21swapper/420:50:2734
2227799206200,4cyclictest0-21swapper/1800:27:1610
2227799206200,4cyclictest0-21swapper/1800:27:1610
2225999201191,7cyclictest0-21swapper/420:15:1334
2225999201191,7cyclictest0-21swapper/420:15:1334
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional