You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-19 - 22:38
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack6slot0.osadl.org (updated Sat Sep 19, 2026 13:02:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1871499198192,4cyclictest0-21swapper/3607:55:3230
1871499198192,4cyclictest0-21swapper/3607:55:3230
1868899195184,5cyclictest0-21swapper/1311:39:015
1868899195184,5cyclictest0-21swapper/1311:39:015
1871499193177,13cyclictest0-21swapper/3609:57:1330
1871499193177,13cyclictest0-21swapper/3609:57:1330
1871499193177,13cyclictest0-21swapper/3609:57:1330
186779919386,96cyclictest3548-21CPU23
186779919386,96cyclictest3548-21CPU23
186779919386,96cyclictest3548-21CPU23
1868599191140,48cyclictest0-21swapper/1109:38:413
1868599191140,48cyclictest0-21swapper/1109:38:413
18673991901,186cyclictest0-21swapper/112:20:131
18673991901,186cyclictest0-21swapper/112:20:131
1868899189181,5cyclictest0-21swapper/1309:25:015
1868899189181,5cyclictest0-21swapper/1309:25:005
1871499188180,5cyclictest0-21swapper/3609:24:5930
1871499188180,5cyclictest0-21swapper/3609:24:5930
1871299187177,8cyclictest0-21swapper/3410:21:2128
1871299187177,8cyclictest0-21swapper/3410:21:2128
1871299187177,8cyclictest0-21swapper/3410:21:2128
1869699187183,3cyclictest0-21swapper/2009:33:0213
1869699187183,3cyclictest0-21swapper/2009:33:0213
18677991864,172cyclictest0-21swapper/308:45:0123
18677991864,172cyclictest0-21swapper/308:45:0123
1867399186140,37cyclictest0-21swapper/110:20:021
1867399186140,37cyclictest0-21swapper/110:20:021
1867399186140,37cyclictest0-21swapper/110:20:021
1871499185178,5cyclictest0-21swapper/3609:10:0130
1871499185178,5cyclictest0-21swapper/3609:10:0130
1871499184177,5cyclictest3600-21qemu-system-x8612:07:1630
1871499184177,5cyclictest3600-21qemu-system-x8612:07:1530
1871499184177,5cyclictest3600-21qemu-system-x8612:07:1530
1871499184175,7cyclictest0-21swapper/3611:25:0130
1871499184175,7cyclictest0-21swapper/3611:25:0030
1871499184175,7cyclictest0-21swapper/3611:25:0030
1871499184171,7cyclictest0-21swapper/3610:24:3030
1871499184171,7cyclictest0-21swapper/3610:24:3030
1871499184171,7cyclictest0-21swapper/3610:24:2930
1871499183176,5cyclictest0-21swapper/3609:51:5730
1871499183176,5cyclictest0-21swapper/3609:51:5730
1871499183176,5cyclictest0-21swapper/3609:51:5630
1871499183171,6cyclictest3545-21CPU30
1871499183171,6cyclictest3545-21CPU30
1867399183120,54cyclictest0-21swapper/112:04:041
1867399183120,54cyclictest0-21swapper/112:04:031
1871499182176,3cyclictest0-21swapper/3609:20:0430
1871499182176,3cyclictest0-21swapper/3609:20:0330
1871499181175,3cyclictest27843-21hddtemp_smartct09:25:1930
1871499181175,3cyclictest27843-21hddtemp_smartct09:25:1830
1871499181175,3cyclictest27843-21hddtemp_smartct09:25:1830
1871499180173,5cyclictest0-21swapper/3611:42:4830
1871499180173,5cyclictest0-21swapper/3611:42:4730
1871499180172,6cyclictest0-21swapper/3610:40:1630
1871499180172,6cyclictest0-21swapper/3610:40:1530
1871499180172,6cyclictest0-21swapper/3610:40:1530
1871499180169,7cyclictest0-21swapper/3611:49:2830
1871499180169,7cyclictest0-21swapper/3611:49:2830
1868899179173,2cyclictest722-21jbd2/sda1-809:31:435
1868899179173,2cyclictest722-21jbd2/sda1-809:31:435
1868599179132,45cyclictest0-21swapper/1109:02:333
1868599179132,45cyclictest0-21swapper/1109:02:333
1867999179167,10cyclictest0-21swapper/509:36:0735
1867999179167,10cyclictest0-21swapper/509:36:0635
1867799179148,26cyclictest0-21swapper/309:15:4323
1867799179148,26cyclictest0-21swapper/309:15:4223
1868599178132,44cyclictest0-21swapper/1111:41:023
1868599178132,44cyclictest0-21swapper/1111:41:023
18673991781,93cyclictest0-21swapper/111:20:191
18673991781,93cyclictest0-21swapper/111:20:191
18673991781,93cyclictest0-21swapper/111:20:191
1871499177170,5cyclictest0-21swapper/3611:25:1330
1871499177170,5cyclictest0-21swapper/3611:25:1330
1871499177170,5cyclictest0-21swapper/3611:25:1330
1871499177166,9cyclictest0-21swapper/3612:19:2930
1871499177166,9cyclictest0-21swapper/3612:19:2830
1869699177165,10cyclictest0-21swapper/2012:06:5313
1869699177165,10cyclictest0-21swapper/2012:06:5213
1869699177165,10cyclictest0-21swapper/2012:06:5213
1869499177165,10cyclictest0-21swapper/1910:47:4311
1869499177165,10cyclictest0-21swapper/1910:47:4311
1869499177165,10cyclictest0-21swapper/1910:47:4211
1871499176170,4cyclictest0-21swapper/3609:40:2830
1871499176170,4cyclictest0-21swapper/3609:40:2830
1869499176170,3cyclictest0-21swapper/1907:22:2611
1871499175162,11cyclictest0-21swapper/3608:51:0430
1871499175162,11cyclictest0-21swapper/3608:51:0430
1868599175146,20cyclictest17484-21nfsd08:42:333
1868599175146,20cyclictest17484-21nfsd08:42:333
1868599175139,33cyclictest0-21swapper/1111:35:093
1868599175139,33cyclictest0-21swapper/1111:35:093
1868599175135,31cyclictest0-21swapper/1110:01:053
1868599175135,31cyclictest0-21swapper/1110:01:043
1871499174168,4cyclictest0-21swapper/3610:05:5230
1871499174168,4cyclictest0-21swapper/3610:05:5230
1871499174163,9cyclictest0-21swapper/3610:10:1430
1871499174163,9cyclictest0-21swapper/3610:10:1430
1871499174163,9cyclictest0-21swapper/3610:10:1430
1870599174129,42cyclictest0-21swapper/2812:39:3321
1870599174129,42cyclictest0-21swapper/2812:39:3221
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional