You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-10 - 13:11
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack6slot0.osadl.org (updated Fri Apr 10, 2026 01:02:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3561099253212,21cyclictest0-21swapper/1423:40:166
3561099253212,21cyclictest0-21swapper/1423:40:166
3560199239233,3cyclictest2454-21CPU36
3560199239233,3cyclictest2454-21CPU36
3560199239233,3cyclictest2454-21CPU36
3561099236222,4cyclictest3610-21CPU6
3561099236222,4cyclictest3610-21CPU6
3561099236222,4cyclictest3610-21CPU6
3561099236215,8cyclictest0-21swapper/1421:25:216
3561099236215,8cyclictest0-21swapper/1421:25:216
3561099218213,3cyclictest15949-21sshd22:03:036
3561099218213,3cyclictest15949-21sshd22:03:036
3561099218213,3cyclictest15949-21sshd22:03:036
3561099215208,5cyclictest0-21swapper/1400:15:156
3561099215208,5cyclictest0-21swapper/1400:15:156
3561099215208,5cyclictest0-21swapper/1400:15:156
3561099213206,5cyclictest0-21swapper/1423:30:026
3561099213206,5cyclictest0-21swapper/1423:30:016
3561099212202,6cyclictest2454-21CPU6
3561099212202,6cyclictest2454-21CPU6
3559999212205,5cyclictest0-21swapper/422:58:4434
3559999212205,5cyclictest0-21swapper/422:58:4334
3559999211186,15cyclictest0-21swapper/420:16:1234
3559999211186,15cyclictest0-21swapper/420:16:1234
3562799210200,6cyclictest0-21swapper/2900:29:2022
3562799210200,6cyclictest0-21swapper/2900:29:2022
3562799210200,6cyclictest0-21swapper/2900:29:2022
3561099210203,5cyclictest0-21swapper/1422:16:316
3561099210203,5cyclictest0-21swapper/1422:16:316
3561099210202,6cyclictest0-21swapper/1422:39:396
3561099210202,6cyclictest0-21swapper/1422:39:386
3561099209204,4cyclictest0-21swapper/1422:51:226
3561099209204,4cyclictest0-21swapper/1422:51:226
3561099209202,4cyclictest0-21swapper/1422:30:256
3561099209202,4cyclictest0-21swapper/1422:30:256
3561099209202,4cyclictest0-21swapper/1422:30:256
3561099208196,8cyclictest0-21swapper/1420:10:096
3561099208196,8cyclictest0-21swapper/1420:10:096
3562399207199,4cyclictest3610-21CPU18
3562399207199,4cyclictest3610-21CPU18
3561099207201,4cyclictest0-21swapper/1400:26:076
3561099207201,4cyclictest0-21swapper/1400:26:076
3561099207201,4cyclictest0-21swapper/1400:26:076
3561099207200,5cyclictest0-21swapper/1422:25:206
3561099207200,5cyclictest0-21swapper/1422:25:206
3563799206200,3cyclictest0-21swapper/3723:55:1531
3563799206200,3cyclictest0-21swapper/3723:55:1531
3563799206200,3cyclictest0-21swapper/3723:55:1431
3562399206196,9cyclictest0-21swapper/2519:49:1418
3562399206196,9cyclictest0-21swapper/2519:49:1418
3561199206203,2cyclictest0-21swapper/1519:30:157
3561199206203,2cyclictest0-21swapper/1519:30:157
3561099206200,4cyclictest0-21swapper/1423:10:236
3561099206200,4cyclictest0-21swapper/1423:10:236
3561099206200,4cyclictest0-21swapper/1423:10:236
3561099206199,5cyclictest0-21swapper/1423:59:106
3561099206199,5cyclictest0-21swapper/1423:59:096
3561099206199,5cyclictest0-21swapper/1423:59:096
3560199206198,3cyclictest0-21swapper/623:10:1436
3560199206198,3cyclictest0-21swapper/623:10:1436
3560199206198,3cyclictest0-21swapper/623:10:1436
3559999206186,15cyclictest2456-21CPU34
3559999206186,15cyclictest2456-21CPU34
3561099205200,4cyclictest0-21swapper/1422:22:536
3561099205200,4cyclictest0-21swapper/1422:22:536
3561099205200,3cyclictest3535-21qemu-system-x8622:10:176
3561099205200,3cyclictest3535-21qemu-system-x8622:10:176
3561099205197,5cyclictest0-21swapper/1423:47:186
3561099205197,5cyclictest0-21swapper/1423:47:186
3561099205195,8cyclictest26255-21sshd23:51:266
3561099205195,8cyclictest26255-21sshd23:51:266
3559999205198,4cyclictest0-21swapper/421:50:2634
3559999205198,4cyclictest0-21swapper/421:50:2634
3559999205198,4cyclictest0-21swapper/421:50:2634
3563199204201,2cyclictest0-21swapper/3223:05:1526
3563199204201,2cyclictest0-21swapper/3223:05:1426
3563199204201,2cyclictest0-21swapper/3223:05:1426
3562399204191,7cyclictest0-21swapper/2521:50:4118
3562399204191,7cyclictest0-21swapper/2521:50:4118
3562399204191,7cyclictest0-21swapper/2521:50:4118
3562199204201,2cyclictest0-21swapper/2323:20:1416
3562199204201,2cyclictest0-21swapper/2323:20:1416
3562199204201,2cyclictest0-21swapper/2323:20:1416
3562399203193,8cyclictest0-21swapper/2519:50:1418
3561099203197,4cyclictest0-21swapper/1423:32:376
3561099203197,4cyclictest0-21swapper/1423:32:366
3561099203196,5cyclictest0-21swapper/1421:42:226
3561099203196,5cyclictest0-21swapper/1421:42:226
3561099202197,4cyclictest0-21swapper/1400:08:576
3561099202197,4cyclictest0-21swapper/1400:08:576
3561099202196,4cyclictest0-21swapper/1422:06:236
3561099202196,4cyclictest0-21swapper/1422:06:236
3561099202196,4cyclictest0-21swapper/1421:32:556
3561099202196,4cyclictest0-21swapper/1421:32:556
3561099202196,4cyclictest0-21swapper/1420:15:376
3561099202196,4cyclictest0-21swapper/1420:15:376
3561099202194,5cyclictest0-21swapper/1423:23:476
3561099202194,5cyclictest0-21swapper/1423:23:476
3561099202194,5cyclictest0-21swapper/1423:23:476
3561099202192,9cyclictest0-21swapper/1423:01:056
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional