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2026-09-01 - 22:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack6slot0.osadl.org (updated Tue Sep 01, 2026 13:01:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1938199229160,57cyclictest0-21swapper/2010:50:1813
1938199229160,57cyclictest0-21swapper/2010:50:1813
1935899219202,13cyclictest14395-21lxd11:55:171
1935899219202,13cyclictest14395-21lxd11:55:161
1936299217151,50cyclictest0-21swapper/511:00:0035
1936299217151,50cyclictest0-21swapper/511:00:0035
1935899210173,24cyclictest0-21swapper/111:51:431
1935899210173,24cyclictest0-21swapper/111:51:421
1935899210173,24cyclictest0-21swapper/111:51:421
1936399207204,2cyclictest0-21swapper/610:45:1436
1936399207204,2cyclictest0-21swapper/610:45:1436
1936399207204,2cyclictest0-21swapper/610:45:1436
1935999206188,3cyclictest0-21swapper/209:13:2212
1935999206188,3cyclictest0-21swapper/209:13:2112
1940399197117,73cyclictest3547-21CPU33
1940399197117,73cyclictest3547-21CPU33
1940399197117,73cyclictest3547-21CPU33
19370991931,10cyclictest0-21swapper/1107:10:133
19370991931,10cyclictest0-21swapper/1107:10:123
1936799192169,13cyclictest0-21swapper/912:37:4239
1936799192169,13cyclictest0-21swapper/912:37:4239
1936199191186,3cyclictest0-21swapper/411:05:4234
1936199191186,3cyclictest0-21swapper/411:05:4234
1935899191181,8cyclictest0-21swapper/112:04:011
1935899191181,8cyclictest0-21swapper/112:04:011
1937199190142,35cyclictest3547-21CPU4
1937199190142,35cyclictest3547-21CPU4
1938399187164,19cyclictest0-21swapper/2209:21:0215
1938399187164,19cyclictest0-21swapper/2209:21:0115
1936699186144,21cyclictest2454-21CPU38
1936699186144,21cyclictest2454-21CPU38
193629918686,91cyclictest6999-21run-parts11:55:1935
193629918686,91cyclictest6999-21run-parts11:55:1935
193739918585,97cyclictest0-21swapper/1312:05:235
193739918585,97cyclictest0-21swapper/1312:05:225
1936199185171,13cyclictest0-21swapper/408:05:3034
1936199185171,13cyclictest0-21swapper/408:05:3034
1935999185172,8cyclictest0-21swapper/210:38:4712
1935999185172,8cyclictest0-21swapper/210:38:4612
1938399184164,17cyclictest17477-21nfsd09:55:2215
1938399184164,17cyclictest17477-21nfsd09:55:2115
193839918360,103cyclictest0-21swapper/2211:35:3215
193839918360,103cyclictest0-21swapper/2211:35:3215
193839918360,103cyclictest0-21swapper/2211:35:3115
19368991831,105cyclictest2447-21CPU2
19368991831,105cyclictest2447-21CPU2
19362991811,82cyclictest0-21swapper/510:45:1435
19362991811,82cyclictest0-21swapper/510:45:1335
19362991811,82cyclictest0-21swapper/510:45:1335
1940099180172,3cyclictest0-21swapper/3612:00:5630
1940099180172,3cyclictest0-21swapper/3612:00:5530
19397991802,9cyclictest37358-21CPU27
19397991802,9cyclictest37358-21CPU27
193959918044,40cyclictest2447-21CPU26
193959918044,40cyclictest2447-21CPU26
19381991800,5cyclictest3600-21qemu-system-x8612:12:1113
19381991800,5cyclictest3600-21qemu-system-x8612:12:1013
1936199180104,38cyclictest2461-21CPU34
1936199180104,38cyclictest2461-21CPU34
1936199180104,38cyclictest2461-21CPU34
1935999180169,9cyclictest0-21swapper/207:25:1812
1935999180169,9cyclictest0-21swapper/207:25:1812
1936199179174,3cyclictest0-21swapper/410:47:2034
1936199179174,3cyclictest0-21swapper/410:47:1934
1936199179174,3cyclictest0-21swapper/410:47:1934
1937699178141,34cyclictest0-21swapper/1510:39:597
1937699178141,34cyclictest0-21swapper/1510:39:587
1938399177160,14cyclictest0-21swapper/2211:45:0115
1938399177160,14cyclictest0-21swapper/2211:45:0115
1936699177150,25cyclictest0-21swapper/811:21:0938
1936699177150,25cyclictest0-21swapper/811:21:0938
1935999177166,6cyclictest0-21swapper/209:23:1312
1935999177166,6cyclictest0-21swapper/209:23:1212
1935899177165,6cyclictest0-21swapper/109:20:541
1935899177165,6cyclictest0-21swapper/109:20:541
1938199176149,24cyclictest0-21swapper/2010:04:3913
1938199176149,24cyclictest0-21swapper/2010:04:3913
1937999176152,16cyclictest0-21swapper/1809:35:4410
1937999176152,16cyclictest0-21swapper/1809:35:4410
19373991761,171cyclictest0-21swapper/1308:15:225
19373991761,171cyclictest0-21swapper/1308:15:225
1937099176118,54cyclictest4408-21CPU3
1937099176118,54cyclictest4408-21CPU3
19368991761,173cyclictest0-21swapper/1009:45:292
19368991761,173cyclictest0-21swapper/1009:45:292
19368991761,173cyclictest0-21swapper/1009:45:292
1935999176162,7cyclictest0-21swapper/212:37:5112
1935999176162,7cyclictest0-21swapper/212:37:5012
1935999176156,18cyclictest0-21swapper/208:50:3412
1935999176156,18cyclictest0-21swapper/208:50:3312
1939299175130,41cyclictest2447-21CPU24
1939299175130,41cyclictest2447-21CPU24
1939299175130,41cyclictest2447-21CPU24
19381991751,6cyclictest1367-21dbus-daemon09:15:1713
19381991751,6cyclictest1367-21dbus-daemon09:15:1613
19379991751,169cyclictest0-21swapper/1810:45:1510
19379991751,169cyclictest0-21swapper/1810:45:1410
19379991751,169cyclictest0-21swapper/1810:45:1410
1936899175148,22cyclictest0-21swapper/1009:40:172
1936899175148,22cyclictest0-21swapper/1009:40:162
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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