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2026-09-14 - 19:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack6slot0.osadl.org (updated Mon Sep 14, 2026 13:02:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
525699225218,4cyclictest0-21swapper/2109:25:1514
525699225218,4cyclictest0-21swapper/2109:25:1514
525699225218,4cyclictest0-21swapper/2109:25:1514
525699212200,10cyclictest0-21swapper/2110:52:5114
525699212200,10cyclictest0-21swapper/2110:52:5114
523699208179,23cyclictest0-21swapper/409:32:2534
523699208179,23cyclictest0-21swapper/409:32:2534
525699206200,3cyclictest1-21systemd10:58:4414
525699206200,3cyclictest1-21systemd10:58:4414
525699205199,4cyclictest481-21sshd09:35:1714
525699205199,4cyclictest481-21sshd09:35:1714
525699204192,10cyclictest0-21swapper/2112:21:3314
525699204192,10cyclictest0-21swapper/2112:21:3214
525699203195,5cyclictest755-21systemd-journal09:16:4414
525699203195,5cyclictest755-21systemd-journal09:16:4314
525699203193,8cyclictest0-21swapper/2111:20:2614
525699203193,8cyclictest0-21swapper/2111:20:2614
525699203193,8cyclictest0-21swapper/2111:20:2614
525699202194,5cyclictest0-21swapper/2112:00:2214
525699202194,5cyclictest0-21swapper/2112:00:2114
525699201194,5cyclictest0-21swapper/2111:38:1814
525699201194,5cyclictest0-21swapper/2111:38:1814
525699201193,6cyclictest0-21swapper/2111:30:0314
525699201193,6cyclictest0-21swapper/2111:30:0214
525699201191,8cyclictest0-21swapper/2110:21:1214
525699201191,8cyclictest0-21swapper/2110:21:1214
525699200193,4cyclictest0-21swapper/2111:34:3914
525699200193,4cyclictest0-21swapper/2111:34:3814
525699200193,4cyclictest0-21swapper/2111:34:3814
525699200190,8cyclictest0-21swapper/2109:40:5714
525699200190,8cyclictest0-21swapper/2109:40:5714
525699200190,8cyclictest0-21swapper/2109:40:5714
525699199188,9cyclictest0-21swapper/2109:00:2314
525699199188,9cyclictest0-21swapper/2109:00:2314
525699199188,8cyclictest24952-21packagekitd11:41:3914
525699199188,8cyclictest24952-21packagekitd11:41:3914
525699198192,5cyclictest0-21swapper/2112:06:3114
525699198192,5cyclictest0-21swapper/2112:06:3014
525699198187,9cyclictest0-21swapper/2111:01:3414
525699198187,9cyclictest0-21swapper/2111:01:3414
525699198187,9cyclictest0-21swapper/2111:01:3414
525699197191,3cyclictest22659-21sshd09:52:4114
525699197191,3cyclictest22659-21sshd09:52:4114
525699197185,9cyclictest0-21swapper/2112:35:1714
525699197185,9cyclictest0-21swapper/2112:35:1614
525699197185,9cyclictest0-21swapper/2109:10:4814
525699197185,9cyclictest0-21swapper/2109:10:4714
525699196191,4cyclictest0-21swapper/2111:51:5614
525699196191,4cyclictest0-21swapper/2111:51:5614
525699196187,7cyclictest0-21swapper/2110:01:1014
525699196187,7cyclictest0-21swapper/2110:01:1014
525699195188,5cyclictest0-21swapper/2108:51:3614
525699195188,5cyclictest0-21swapper/2108:51:3614
525699194188,4cyclictest0-21swapper/2110:07:4614
525699194188,4cyclictest0-21swapper/2110:07:4614
525699194187,5cyclictest0-21swapper/2109:20:5914
525699194187,5cyclictest0-21swapper/2109:20:5814
525699194187,5cyclictest0-21swapper/2109:20:5814
525699194185,6cyclictest0-21swapper/2112:16:3714
525699194185,6cyclictest0-21swapper/2112:16:3614
525699194185,6cyclictest0-21swapper/2112:16:3614
524799194154,31cyclictest2447-21CPU5
524799194154,31cyclictest2447-21CPU5
523699194167,24cyclictest0-21swapper/409:39:0834
523699194167,24cyclictest0-21swapper/409:39:0834
525699193184,7cyclictest27220-21cpuspeed_turbos11:10:1314
525699193184,7cyclictest27220-21cpuspeed_turbos11:10:1314
525699193184,7cyclictest27220-21cpuspeed_turbos11:10:1214
524599193160,15cyclictest0-21swapper/1110:21:253
524599193160,15cyclictest0-21swapper/1110:21:253
523699193177,13cyclictest0-21swapper/411:37:0434
523699193177,13cyclictest0-21swapper/411:37:0434
523199193173,14cyclictest0-21swapper/007:20:180
523199193173,14cyclictest0-21swapper/007:20:170
523199193173,14cyclictest0-21swapper/007:20:170
525699192185,5cyclictest0-21swapper/2110:42:5214
525699192185,5cyclictest0-21swapper/2110:42:5214
525699192185,5cyclictest0-21swapper/2109:59:0214
525699192185,5cyclictest0-21swapper/2109:59:0214
523699192168,21cyclictest0-21swapper/410:36:3734
523699192168,21cyclictest0-21swapper/410:36:3734
523199192185,5cyclictest0-21swapper/007:40:250
523199192185,5cyclictest0-21swapper/007:40:250
525699191185,4cyclictest0-21swapper/2109:46:3114
525699191185,4cyclictest0-21swapper/2109:46:3014
525699191183,6cyclictest0-21swapper/2109:30:2014
525699191183,6cyclictest0-21swapper/2109:30:2014
525699191182,6cyclictest0-21swapper/2108:35:1614
525699191182,6cyclictest0-21swapper/2108:35:1614
525699190182,5cyclictest0-21swapper/2112:10:0914
525699190182,5cyclictest0-21swapper/2112:10:0814
525699189183,4cyclictest0-21swapper/2108:40:1814
525699189183,4cyclictest0-21swapper/2108:40:1814
525699189181,6cyclictest0-21swapper/2112:27:0514
525699189181,6cyclictest0-21swapper/2112:27:0414
525699189181,6cyclictest0-21swapper/2111:55:1114
525699189181,6cyclictest0-21swapper/2111:55:1114
525699189178,7cyclictest3541-21CPU14
525699189178,7cyclictest3541-21CPU14
525699189175,11cyclictest3535-21qemu-system-x8608:50:0114
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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