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2026-07-08 - 08:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack6slot0.osadl.org (updated Wed Jul 08, 2026 01:02:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3199499219208,6cyclictest37352-21CPU18
3199499219208,6cyclictest37352-21CPU18
3200999213205,5cyclictest1384-21rs:main31
3200999213205,5cyclictest1384-21rs:main31
3197799213201,10cyclictest0-21swapper/1023:28:112
3197799213201,10cyclictest0-21swapper/1023:28:112
3200299212207,4cyclictest0-21swapper/3122:32:3325
3200299212207,4cyclictest0-21swapper/3122:32:3325
3200299212207,4cyclictest0-21swapper/3122:32:3325
3199499212201,7cyclictest2456-21CPU18
3199499212201,7cyclictest2456-21CPU18
3196999204197,5cyclictest0-21swapper/300:11:2323
3196999204197,5cyclictest0-21swapper/300:11:2323
3196999204197,5cyclictest0-21swapper/300:11:2323
3200999203196,5cyclictest0-21swapper/3722:38:2831
3200999203196,5cyclictest0-21swapper/3722:38:2831
3200999202194,6cyclictest0-21swapper/3722:31:5731
3200999202194,6cyclictest0-21swapper/3722:31:5731
3200999202194,6cyclictest0-21swapper/3722:31:5731
3196999202190,10cyclictest0-21swapper/323:44:2623
3196999202190,10cyclictest0-21swapper/323:44:2623
3198399201193,4cyclictest37352-21CPU7
3198399201193,4cyclictest37352-21CPU7
3198399201193,4cyclictest37352-21CPU7
3197799201193,6cyclictest0-21swapper/1021:10:152
3197799201193,6cyclictest0-21swapper/1021:10:152
3197799201193,6cyclictest0-21swapper/1021:10:152
3196999200190,7cyclictest0-21swapper/319:20:1223
3196999200190,7cyclictest0-21swapper/319:20:1223
3200299199194,4cyclictest0-21swapper/3122:24:0325
3200299199194,4cyclictest0-21swapper/3122:24:0325
3200299199194,4cyclictest0-21swapper/3122:24:0325
3198399199190,6cyclictest3541-21CPU7
3198399199190,6cyclictest3541-21CPU7
3196999199194,3cyclictest0-21swapper/322:45:5223
3196999199194,3cyclictest0-21swapper/322:45:5223
3196999199191,6cyclictest0-21swapper/321:27:3923
3196999199191,6cyclictest0-21swapper/321:27:3923
3199499198187,8cyclictest0-21swapper/2520:00:1118
3199499198187,8cyclictest0-21swapper/2520:00:1018
3198399198193,4cyclictest0-21swapper/1520:02:177
3198399198193,4cyclictest0-21swapper/1520:02:177
3198399198184,10cyclictest0-21swapper/1523:46:107
3198399198184,10cyclictest0-21swapper/1523:46:107
3198399198184,10cyclictest0-21swapper/1523:46:097
3198399197189,6cyclictest1360-21systemd-logind21:32:517
3198399197189,6cyclictest1360-21systemd-logind21:32:507
3196999197192,2cyclictest0-21swapper/320:05:4023
3200299196191,4cyclictest0-21swapper/3120:55:4525
3200299196191,4cyclictest0-21swapper/3120:55:4525
3198399196187,6cyclictest0-21swapper/1522:09:227
3198399196187,6cyclictest0-21swapper/1522:09:227
3196999196188,6cyclictest0-21swapper/300:35:4523
3196999196188,6cyclictest0-21swapper/300:35:4523
3200999195187,6cyclictest0-21swapper/3719:40:1231
3200999195187,6cyclictest0-21swapper/3719:40:1231
3196999195187,6cyclictest0-21swapper/321:54:2923
3196999195187,6cyclictest0-21swapper/321:54:2923
3200999194181,11cyclictest1360-21systemd-logind22:28:1031
3200999194181,11cyclictest1360-21systemd-logind22:28:1031
3200999194181,11cyclictest1360-21systemd-logind22:28:1031
3200299194187,5cyclictest0-21swapper/3122:13:4925
3200299194187,5cyclictest0-21swapper/3122:13:4925
3196999194188,4cyclictest0-21swapper/323:34:5723
3196999194188,4cyclictest0-21swapper/323:34:5723
3196999194188,4cyclictest0-21swapper/323:34:5723
3196999194184,8cyclictest0-21swapper/300:07:4323
3196999194184,8cyclictest0-21swapper/300:07:4323
3199499193188,4cyclictest0-21swapper/2520:40:0118
3199499193188,4cyclictest0-21swapper/2520:40:0118
3199499193187,4cyclictest0-21swapper/2523:49:0518
3199499193187,4cyclictest0-21swapper/2523:49:0518
3199499193187,4cyclictest0-21swapper/2523:49:0518
3199499193185,6cyclictest0-21swapper/2523:20:0418
3199499193185,6cyclictest0-21swapper/2523:20:0418
3198399193186,5cyclictest0-21swapper/1522:35:127
3198399193186,5cyclictest0-21swapper/1522:35:127
3198399193184,8cyclictest0-21swapper/1522:25:147
3198399193184,8cyclictest0-21swapper/1522:25:147
3198399193184,8cyclictest0-21swapper/1522:25:147
3197799193185,6cyclictest3835-21systemctl21:42:442
3197799193185,6cyclictest3835-21systemctl21:42:442
3196999193181,10cyclictest0-21swapper/320:25:0123
3196999193181,10cyclictest0-21swapper/320:25:0123
3200999191187,2cyclictest0-21swapper/3719:56:4831
3200999191187,2cyclictest0-21swapper/3719:56:4731
3199499191182,6cyclictest0-21swapper/2521:30:1418
3199499191182,6cyclictest0-21swapper/2521:30:1418
3198399191185,4cyclictest0-21swapper/1520:13:007
3197199191185,3cyclictest7640-21sshd21:30:4435
3197199191185,3cyclictest7640-21sshd21:30:4435
3196999191182,6cyclictest0-21swapper/323:01:1423
3196999191182,6cyclictest0-21swapper/323:01:1423
3196999191182,6cyclictest0-21swapper/322:50:3023
3196999191182,6cyclictest0-21swapper/322:50:3023
3196999191177,11cyclictest0-21swapper/322:05:1723
3196999191177,11cyclictest0-21swapper/322:05:1723
3201199190184,4cyclictest0-21swapper/3900:26:3733
3201199190184,4cyclictest0-21swapper/3900:26:3733
3201199190184,4cyclictest0-21swapper/3900:26:3733
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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