You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-21 - 04:54
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack6slot0.osadl.org (updated Tue Jul 21, 2026 01:01:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
940999258227,4cyclictest171rcu_preempt00:34:2438
940999258227,4cyclictest171rcu_preempt00:34:2338
942999208193,10cyclictest0-21swapper/2422:40:5117
942999208193,10cyclictest0-21swapper/2422:40:5117
942999201193,6cyclictest0-21swapper/2421:47:3317
942999201193,6cyclictest0-21swapper/2421:47:3217
940399197193,2cyclictest0-21swapper/323:50:1623
940399197193,2cyclictest0-21swapper/323:50:1623
94079919629,163cyclictest0-21swapper/600:00:1936
94079919629,163cyclictest0-21swapper/600:00:1936
944699193153,30cyclictest0-21swapper/3800:11:4632
944699193153,30cyclictest0-21swapper/3800:11:4532
942999192185,4cyclictest2456-21CPU17
942999192185,4cyclictest2456-21CPU17
942999189181,6cyclictest0-21swapper/2423:20:0817
942999189181,6cyclictest0-21swapper/2423:20:0717
942999189181,5cyclictest4407-21CPU17
942999189181,5cyclictest4407-21CPU17
940999189179,7cyclictest0-21swapper/821:54:2538
940999189179,7cyclictest0-21swapper/821:54:2538
939999188123,53cyclictest3541-21CPU0
939999188123,53cyclictest3541-21CPU0
942999186174,9cyclictest4554-21cstates21:00:1517
942999186174,9cyclictest4554-21cstates21:00:1517
942999185178,5cyclictest0-21swapper/2422:47:5317
942999185178,5cyclictest0-21swapper/2422:47:5317
942999185178,5cyclictest0-21swapper/2422:47:5217
939999185147,23cyclictest2456-21CPU0
939999185147,23cyclictest2456-21CPU0
939999185147,23cyclictest2456-21CPU0
944599184157,23cyclictest3544-21CPU31
944599184157,23cyclictest3544-21CPU31
942999184179,3cyclictest0-21swapper/2423:08:4817
942999184179,3cyclictest0-21swapper/2423:08:4817
942999184172,9cyclictest0-21swapper/2420:40:3217
942999184172,9cyclictest0-21swapper/2420:40:3117
942999183171,8cyclictest0-21swapper/2423:18:2417
942999183171,8cyclictest0-21swapper/2423:18:2417
942999183169,11cyclictest0-21swapper/2400:22:3617
942999183169,11cyclictest0-21swapper/2400:22:3517
942299183170,8cyclictest0-21swapper/1823:09:4710
942299183170,8cyclictest0-21swapper/1823:09:4710
941799182172,8cyclictest0-21swapper/1321:52:425
941799182172,8cyclictest0-21swapper/1321:52:415
942999181173,7cyclictest0-21swapper/2423:01:3117
942999181173,7cyclictest0-21swapper/2423:01:3117
942999181168,8cyclictest0-21swapper/2422:21:1717
942999181168,8cyclictest0-21swapper/2422:21:1717
942999181165,9cyclictest0-21swapper/2422:54:1317
942999181165,9cyclictest0-21swapper/2422:54:1217
940999181142,22cyclictest0-21swapper/823:10:5638
940999181142,22cyclictest0-21swapper/823:10:5538
940799181144,35cyclictest0-21swapper/622:26:0936
940799181144,35cyclictest0-21swapper/622:26:0836
943299180147,19cyclictest0-21swapper/2700:16:1920
943299180147,19cyclictest0-21swapper/2700:16:1820
943299180147,19cyclictest0-21swapper/2700:16:1820
942999179171,6cyclictest0-21swapper/2400:10:2517
942999179171,6cyclictest0-21swapper/2400:10:2517
942999179170,7cyclictest0-21swapper/2423:55:2117
942999179170,7cyclictest0-21swapper/2423:55:2017
942999179167,10cyclictest0-21swapper/2422:30:2117
942999179167,10cyclictest0-21swapper/2422:30:2117
940999179149,10cyclictest171rcu_preempt21:27:5338
940999179149,10cyclictest171rcu_preempt21:27:5338
939999179167,9cyclictest0-21swapper/022:16:170
939999179167,9cyclictest0-21swapper/022:16:170
939999179162,3cyclictest171rcu_preempt21:12:550
939999179162,3cyclictest171rcu_preempt21:12:540
939999179162,3cyclictest171rcu_preempt21:12:540
943499178167,9cyclictest0-21swapper/2900:22:5322
943499178167,9cyclictest0-21swapper/2900:22:5222
942999178170,6cyclictest0-21swapper/2422:27:3617
942999178170,6cyclictest0-21swapper/2422:27:3517
942999178162,12cyclictest0-21swapper/2422:13:4417
942999178162,12cyclictest0-21swapper/2422:13:4417
942999178162,12cyclictest0-21swapper/2422:13:4317
941699178128,33cyclictest0-21swapper/1221:53:294
941699178128,33cyclictest0-21swapper/1221:53:284
941699178114,45cyclictest3609-21CPU4
941699178114,45cyclictest3609-21CPU4
940299178168,2cyclictest0-21swapper/223:17:1312
940299178168,2cyclictest0-21swapper/223:17:1312
939999178150,8cyclictest171rcu_preempt21:18:420
939999178150,8cyclictest171rcu_preempt21:18:410
939999178150,8cyclictest171rcu_preempt21:18:410
944599177151,10cyclictest37346-21qemu-system-x8600:20:2731
944599177151,10cyclictest37346-21qemu-system-x8600:20:2631
942999177170,4cyclictest0-21swapper/2421:56:0717
942999177170,4cyclictest0-21swapper/2421:56:0717
940999177171,4cyclictest37930-21kworker/u80:1-ext4-rsv-conversion20:10:0138
940999177171,4cyclictest37930-21kworker/u80:1-ext4-rsv-conversion20:10:0138
940999177165,9cyclictest0-21swapper/820:35:3538
940999177165,9cyclictest0-21swapper/820:35:3538
943299176146,25cyclictest0-21swapper/2722:21:4420
943299176146,25cyclictest0-21swapper/2722:21:4420
942999176170,5cyclictest0-21swapper/2421:37:1717
942999176170,5cyclictest0-21swapper/2421:37:1717
942999175166,6cyclictest0-21swapper/2422:07:4217
942999175166,6cyclictest0-21swapper/2422:07:4217
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional