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2025-11-21 - 23:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack6slot0.osadl.org (updated Fri Nov 21, 2025 13:01:16)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
26317992170,2cyclictest0-21swapper/3809:59:1532
26317992170,2cyclictest0-21swapper/3809:59:1432
26317992170,2cyclictest0-21swapper/3809:59:1432
2629499211192,5cyclictest21538-21inotify_reader11:05:1910
2629499211192,5cyclictest21538-21inotify_reader11:05:1910
2629499211192,5cyclictest21538-21inotify_reader11:05:1910
2630299203191,8cyclictest14734-21inotify_reader07:50:1918
2629499197187,6cyclictest8484-21kworker/u82:1-events_unbound10:38:4110
2629499197187,6cyclictest8484-21kworker/u82:1-events_unbound10:38:4110
26317991953,187cyclictest0-21swapper/3812:05:1532
26317991953,187cyclictest0-21swapper/3812:05:1532
263149919437,39cyclictest0-21swapper/3611:30:1730
263149919437,39cyclictest0-21swapper/3611:30:1730
263149919437,39cyclictest0-21swapper/3611:30:1730
2630299193183,5cyclictest11905-21CPU18
2630299193183,5cyclictest11905-21CPU18
2630299193183,5cyclictest11905-21CPU18
262909919338,39cyclictest4908-21CPU7
262909919338,39cyclictest4908-21CPU7
2630299192186,4cyclictest0-21swapper/2512:28:0218
2630299192186,4cyclictest0-21swapper/2512:28:0218
2627599192186,2cyclictest431rcuc/311:35:2023
2627599192186,2cyclictest431rcuc/311:35:2023
2627599192186,2cyclictest431rcuc/311:35:2023
2630299190176,4cyclictest4624-21qemu-system-x8609:28:2718
2630299190176,4cyclictest4624-21qemu-system-x8609:28:2718
262969919096,70cyclictest0-21swapper/2007:55:1813
262969919096,70cyclictest0-21swapper/2007:55:1813
2629099190170,7cyclictest0-21swapper/1511:55:177
2629099190170,7cyclictest0-21swapper/1511:55:177
2630299189186,2cyclictest2211rcuc/2511:55:1118
2630299189186,2cyclictest2211rcuc/2511:55:1118
2629499189184,3cyclictest0-21swapper/1810:10:2610
2629499189184,3cyclictest0-21swapper/1810:10:2610
2629499189184,3cyclictest0-21swapper/1810:10:2610
2627499189184,4cyclictest0-21swapper/212:02:2912
2627499189184,4cyclictest0-21swapper/212:02:2912
26304991887,167cyclictest0-21swapper/2608:35:1819
26304991887,167cyclictest0-21swapper/2608:35:1819
262829918831,130cyclictest4908-21CPU38
262829918831,130cyclictest4908-21CPU38
2629299186177,8cyclictest0-21swapper/1708:51:269
2629099186164,8cyclictest171rcu_preempt08:05:567
2629099186164,8cyclictest171rcu_preempt08:05:567
263059918531,131cyclictest11899-21CPU20
263059918531,131cyclictest11899-21CPU20
2630299185177,6cyclictest0-21swapper/2509:06:3418
2630299185177,6cyclictest0-21swapper/2509:06:3418
2629499185181,2cyclictest0-21swapper/1810:42:5710
2629499185181,2cyclictest0-21swapper/1810:42:5710
2631499184167,10cyclictest171rcu_preempt09:30:0430
2631499184167,10cyclictest171rcu_preempt09:30:0430
2630299184177,5cyclictest0-21swapper/2511:11:0918
2630299184177,5cyclictest0-21swapper/2511:11:0918
2630299184177,5cyclictest0-21swapper/2511:11:0918
2629299184171,11cyclictest0-21swapper/1709:19:189
2629299184171,11cyclictest0-21swapper/1709:19:189
2629299184171,11cyclictest0-21swapper/1709:19:189
2627599184173,9cyclictest36796-21nfsd11:42:5323
2627599184173,9cyclictest36796-21nfsd11:42:5323
2627599184173,9cyclictest36796-21nfsd11:42:5323
2627499184155,13cyclictest171rcu_preempt07:25:3612
2627499184155,13cyclictest171rcu_preempt07:25:3612
26317991831,82cyclictest0-21swapper/3810:10:1732
26317991831,82cyclictest0-21swapper/3810:10:1732
26317991831,82cyclictest0-21swapper/3810:10:1732
2630299183178,3cyclictest0-21swapper/2510:26:3718
2630299183178,3cyclictest0-21swapper/2510:26:3718
2630299183176,5cyclictest0-21swapper/2511:48:1718
2630299183176,5cyclictest0-21swapper/2511:48:1718
2630299183174,5cyclictest4911-21CPU18
2630299183174,5cyclictest4911-21CPU18
2630299183172,10cyclictest0-21swapper/2507:35:2018
2630299183172,10cyclictest0-21swapper/2507:35:2018
2627499183177,4cyclictest0-21swapper/209:36:5212
2627499183177,4cyclictest0-21swapper/209:36:5212
2627499183177,4cyclictest0-21swapper/209:36:5212
2631799182124,51cyclictest0-21swapper/3807:15:0232
2631799182124,51cyclictest0-21swapper/3807:15:0232
2631299182176,4cyclictest0-21swapper/3412:05:1528
2631299182176,4cyclictest0-21swapper/3412:05:1528
2629199182165,11cyclictest0-21swapper/1609:31:078
2629199182165,11cyclictest0-21swapper/1609:31:078
2630299181167,10cyclictest0-21swapper/2509:13:2418
2630299181167,10cyclictest0-21swapper/2509:13:2418
2630299181167,10cyclictest0-21swapper/2509:13:2418
2627599181172,7cyclictest0-21swapper/309:43:1023
2627599181172,7cyclictest0-21swapper/309:43:1023
26273991811,119cyclictest0-21swapper/111:35:181
26273991811,119cyclictest0-21swapper/111:35:181
26273991811,119cyclictest0-21swapper/111:35:181
263179918092,79cyclictest3078-21CPU32
263179918092,79cyclictest3078-21CPU32
263179918092,79cyclictest3078-21CPU32
2631799180102,75cyclictest25044-21inotify_reader08:30:2032
2631799180102,75cyclictest25044-21inotify_reader08:30:1932
2631299180167,7cyclictest0-21swapper/3409:47:3628
2631299180167,7cyclictest0-21swapper/3409:47:3628
2631299180167,7cyclictest0-21swapper/3409:47:3628
2630299180176,2cyclictest0-21swapper/2512:13:1618
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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