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2026-02-22 - 20:31
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack6slot0.osadl.org (updated Sun Feb 22, 2026 13:03:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1988799211202,5cyclictest3543-21CPU34
1988799211202,5cyclictest3543-21CPU34
1988799210205,4cyclictest0-21swapper/410:45:0934
1988799210205,4cyclictest0-21swapper/410:45:0934
1988799210205,4cyclictest0-21swapper/410:45:0934
1988799210200,6cyclictest0-21swapper/409:24:0534
1988799210200,6cyclictest0-21swapper/409:24:0534
1988799210200,6cyclictest0-21swapper/409:24:0534
1989399208192,5cyclictest0-21swapper/908:35:0439
1989399208192,5cyclictest0-21swapper/908:35:0439
1988799205189,9cyclictest0-21swapper/410:10:0734
1988799205189,9cyclictest0-21swapper/410:10:0734
1988799205189,9cyclictest0-21swapper/410:10:0734
1991999204193,9cyclictest40019-21irqstats11:50:2525
1991999204193,9cyclictest40019-21irqstats11:50:2525
1991999204193,9cyclictest40019-21irqstats11:50:2525
1991999203197,4cyclictest0-21swapper/3111:45:1925
1991999203197,4cyclictest0-21swapper/3111:45:1925
1988899203194,7cyclictest0-21swapper/507:44:1835
1991999202195,4cyclictest3610-21CPU25
1991999202195,4cyclictest3610-21CPU25
1991999201194,5cyclictest1-21systemd11:40:1825
1991999201194,5cyclictest1-21systemd11:40:1825
1991999201194,5cyclictest1-21systemd11:40:1825
1991999201191,6cyclictest0-21swapper/3112:27:0125
1991999201191,6cyclictest0-21swapper/3112:27:0125
1991999201191,6cyclictest0-21swapper/3112:27:0125
1988799200196,2cyclictest0-21swapper/411:55:0834
1988799200196,2cyclictest0-21swapper/411:55:0834
1988799200196,2cyclictest0-21swapper/411:55:0834
1988899199191,7cyclictest0-21swapper/508:03:1035
1988899199191,7cyclictest0-21swapper/508:03:1035
1991999198186,8cyclictest0-21swapper/3112:35:2825
1991999198186,8cyclictest0-21swapper/3112:35:2825
1991999198186,8cyclictest0-21swapper/3112:35:2825
1988799198193,4cyclictest0-21swapper/409:10:3534
1988799198193,4cyclictest0-21swapper/409:10:3534
1988799198193,4cyclictest0-21swapper/409:10:3534
1991999197191,4cyclictest0-21swapper/3111:55:5425
1991999197191,4cyclictest0-21swapper/3111:55:5425
1991999197191,4cyclictest0-21swapper/3111:55:5425
1991999196189,5cyclictest0-21swapper/3112:31:3325
1991999196189,5cyclictest0-21swapper/3112:31:3325
1991999196189,5cyclictest0-21swapper/3112:31:3325
1991999196187,5cyclictest0-21swapper/3111:33:1725
1991999196187,5cyclictest0-21swapper/3111:33:1725
1991999196187,5cyclictest0-21swapper/3111:33:1625
1989499196152,30cyclictest3610-21CPU2
1989499196152,30cyclictest3610-21CPU2
1989499196152,30cyclictest3610-21CPU2
1988799196189,5cyclictest0-21swapper/409:53:2034
1988799196189,5cyclictest0-21swapper/409:53:2034
1988799196189,5cyclictest0-21swapper/409:53:2034
1988799196188,6cyclictest0-21swapper/410:45:0134
1988799196188,6cyclictest0-21swapper/410:45:0134
1988799196187,7cyclictest0-21swapper/410:39:2634
1988799196187,7cyclictest0-21swapper/410:39:2534
1991999195188,3cyclictest0-21swapper/3109:40:0725
1991999195188,3cyclictest0-21swapper/3109:40:0725
1991299195174,12cyclictest0-21swapper/2511:28:3318
1991299195174,12cyclictest0-21swapper/2511:28:3318
1988899195186,7cyclictest0-21swapper/507:47:0335
1988899195186,7cyclictest0-21swapper/507:47:0235
1988799195179,14cyclictest0-21swapper/410:24:5134
1988799195179,14cyclictest0-21swapper/410:24:5134
1988799195179,14cyclictest0-21swapper/410:24:5134
1991999194186,5cyclictest0-21swapper/3112:15:1225
1991999194186,5cyclictest0-21swapper/3112:15:1225
1988899194187,5cyclictest0-21swapper/507:36:5635
1988899194187,5cyclictest0-21swapper/507:36:5635
1988899194185,6cyclictest0-21swapper/508:35:2035
1988899194185,6cyclictest0-21swapper/508:35:2035
1991999193187,3cyclictest21749-21systemd-cgroups12:10:2725
1991999193187,3cyclictest21749-21systemd-cgroups12:10:2725
1988899193176,14cyclictest37346-21qemu-system-x8607:55:3535
1988899193176,14cyclictest37346-21qemu-system-x8607:55:3435
1988799192184,6cyclictest1-21systemd09:40:5334
1988799192184,6cyclictest1-21systemd09:40:5334
1988799192184,5cyclictest0-21swapper/410:50:1634
1988799192184,5cyclictest0-21swapper/410:50:1634
1988799192184,5cyclictest0-21swapper/410:50:1634
1988799192179,7cyclictest0-21swapper/410:26:4134
1988799192179,7cyclictest0-21swapper/410:26:4134
1991999191182,7cyclictest0-21swapper/3112:00:4025
1991999191182,7cyclictest0-21swapper/3112:00:4025
1991999191182,7cyclictest0-21swapper/3112:00:3925
1988899191185,4cyclictest0-21swapper/509:05:1935
1988899191185,4cyclictest0-21swapper/509:05:1935
1988899191185,4cyclictest0-21swapper/509:05:1935
1988899191185,4cyclictest0-21swapper/507:34:2035
1988899191185,4cyclictest0-21swapper/507:34:2035
1988799191184,5cyclictest24897-21grep08:10:1234
1988799191184,5cyclictest24897-21grep08:10:1134
1988799191181,8cyclictest26489-21sshd09:48:2934
1988799191181,8cyclictest26489-21sshd09:48:2834
1992399190156,32cyclictest0-21swapper/3511:53:2329
1992399190156,32cyclictest0-21swapper/3511:53:2329
1992399190156,32cyclictest0-21swapper/3511:53:2229
1988799190187,2cyclictest0-21swapper/407:17:5134
1988799190187,2cyclictest0-21swapper/407:17:5134
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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