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2026-07-18 - 16:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack6slot0.osadl.org (updated Sat Jul 18, 2026 13:02:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1025799248242,2cyclictest0-21swapper/1911:20:1311
1025799248242,2cyclictest0-21swapper/1911:20:1311
1027599234203,16cyclictest0-21swapper/3509:22:1929
1027599234203,16cyclictest0-21swapper/3509:22:1929
1025899231228,2cyclictest0-21swapper/2011:20:2313
1025899231228,2cyclictest0-21swapper/2011:20:2313
1023999228223,3cyclictest0-21swapper/511:20:1835
1023999228223,3cyclictest0-21swapper/511:20:1835
1023499225219,2cyclictest0-21swapper/007:20:010
1023499225219,2cyclictest0-21swapper/007:20:010
1026099219216,2cyclictest0-21swapper/2211:25:0715
1026099219216,2cyclictest0-21swapper/2211:25:0715
1025899213175,36cyclictest372-21kswapd007:20:0413
1025899213175,36cyclictest372-21kswapd007:20:0413
1023499211204,4cyclictest29616-21sshd11:20:160
1023499211204,4cyclictest29616-21sshd11:20:160
1026999207200,5cyclictest0-21swapper/3011:10:1924
1026999207200,5cyclictest0-21swapper/3011:10:1824
1025499205197,5cyclictest2454-21CPU9
1025499205197,5cyclictest2454-21CPU9
1024499205126,70cyclictest2447-21CPU39
1024499205126,70cyclictest2447-21CPU39
1026099204199,3cyclictest0-21swapper/2212:24:0315
1026099204199,3cyclictest0-21swapper/2212:24:0215
10236992021,198cyclictest0-21swapper/207:20:1812
1025699201193,6cyclictest0-21swapper/1811:04:1010
1025699201193,6cyclictest0-21swapper/1811:04:0910
1023699201158,37cyclictest0-21swapper/212:10:5712
1023699201158,37cyclictest0-21swapper/212:10:5712
1023699201158,37cyclictest0-21swapper/212:10:5612
10236992011,159cyclictest22627-21cpuspeed_turbos11:40:1412
10236992011,159cyclictest22627-21cpuspeed_turbos11:40:1412
1026899200167,22cyclictest0-21swapper/2907:41:3622
1026899200167,22cyclictest0-21swapper/2907:41:3622
1026899199177,14cyclictest0-21swapper/2909:33:1922
1026899199177,14cyclictest0-21swapper/2909:33:1922
1024499198191,5cyclictest0-21swapper/911:46:5739
1024499198191,5cyclictest0-21swapper/911:46:5739
1024499198191,2cyclictest0-21swapper/912:19:3439
1024499198191,2cyclictest0-21swapper/912:19:3439
1024699195182,8cyclictest0-21swapper/1111:20:163
1024699195182,8cyclictest0-21swapper/1111:20:153
1026299194167,16cyclictest0-21swapper/2412:19:2317
1026299194167,16cyclictest0-21swapper/2412:19:2317
1024099194171,12cyclictest0-21swapper/611:01:0036
1024099194171,12cyclictest0-21swapper/611:01:0036
1026799193190,2cyclictest0-21swapper/2808:10:2921
1026799193190,2cyclictest0-21swapper/2808:10:2821
1026299193182,4cyclictest0-21swapper/2411:40:5717
1026299193182,4cyclictest0-21swapper/2411:40:5717
1024499193187,4cyclictest0-21swapper/909:49:0239
1024499193187,4cyclictest0-21swapper/909:49:0239
1027999192152,35cyclictest37354-21CPU32
1027999192152,35cyclictest37354-21CPU32
1024299191146,33cyclictest37354-21CPU37
1024299191146,33cyclictest37354-21CPU37
1024299191132,55cyclictest37354-21CPU37
1024299191132,55cyclictest37354-21CPU37
1024099191175,12cyclictest0-21swapper/610:03:3436
1024099191175,12cyclictest0-21swapper/610:03:3436
10236991900,187cyclictest0-21swapper/211:25:1212
10236991900,187cyclictest0-21swapper/211:25:1212
1027599189177,10cyclictest0-21swapper/3511:14:1529
1027599189177,10cyclictest0-21swapper/3511:14:1429
1026099189185,2cyclictest0-21swapper/2209:25:4115
1026099189185,2cyclictest0-21swapper/2209:25:4115
1026099189185,2cyclictest0-21swapper/2209:25:4015
1025699189183,4cyclictest0-21swapper/1809:40:0710
1025699189183,4cyclictest0-21swapper/1809:40:0710
1024099189175,13cyclictest0-21swapper/611:16:2036
1024099189175,13cyclictest0-21swapper/611:16:1936
1023699189173,14cyclictest0-21swapper/211:59:3412
1023699189173,14cyclictest0-21swapper/211:59:3412
1023699189173,14cyclictest0-21swapper/211:59:3312
1027899188172,9cyclictest171rcu_preempt10:46:2931
1027899188172,9cyclictest171rcu_preempt10:46:2931
1027899188172,9cyclictest171rcu_preempt10:46:2831
1026899188177,9cyclictest0-21swapper/2911:39:0922
1026899188177,9cyclictest0-21swapper/2911:39:0822
1025199188185,2cyclictest0-21swapper/1511:25:207
1025199188185,2cyclictest0-21swapper/1511:25:207
1024299188175,9cyclictest0-21swapper/711:56:3237
1024299188175,9cyclictest0-21swapper/711:56:3137
1024299188175,9cyclictest0-21swapper/711:56:3137
1024099188176,10cyclictest0-21swapper/610:24:1436
1024099188176,10cyclictest0-21swapper/610:24:1436
1023599188184,2cyclictest0-21swapper/108:30:211
1023599188184,2cyclictest0-21swapper/108:30:211
1026799187151,33cyclictest3545-21CPU21
1026799187151,33cyclictest3545-21CPU21
1024599187163,21cyclictest3610-21CPU2
1024599187163,21cyclictest3610-21CPU2
1024599187163,21cyclictest3610-21CPU2
10236991871,183cyclictest0-21swapper/211:20:1612
10236991871,183cyclictest0-21swapper/211:20:1512
10236991871,174cyclictest0-21swapper/208:40:2012
10236991871,174cyclictest0-21swapper/208:40:1912
1027899186165,11cyclictest0-21swapper/3708:36:5131
1027899186165,11cyclictest0-21swapper/3708:36:5131
1023999186153,26cyclictest2464-21CPU35
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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