You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-09-18 - 11:11
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack6slot0.osadl.org (updated Thu Sep 18, 2025 01:01:21)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2008599276225,35cyclictest0-21swapper/3523:30:1729
2008599276225,35cyclictest0-21swapper/3523:30:1629
2006899233230,2cyclictest0-21swapper/2123:15:1814
2006899233230,2cyclictest0-21swapper/2123:15:1814
2006899233230,2cyclictest0-21swapper/2123:15:1814
2008599225209,8cyclictest0-21swapper/3521:45:1629
2008599225209,8cyclictest0-21swapper/3521:45:1629
2005699223193,15cyclictest11754-21TaskSchedulerSi23:45:214
2005699223193,15cyclictest11754-21TaskSchedulerSi23:45:204
2005699223193,15cyclictest11754-21TaskSchedulerSi23:45:204
2008599216203,4cyclictest39781-21sshd22:15:1829
2008599216203,4cyclictest39781-21sshd22:15:1829
2008599216203,4cyclictest39781-21sshd22:15:1829
200749921385,123cyclictest15983-21CPU19
200749921385,123cyclictest15983-21CPU19
200749921385,123cyclictest15983-21CPU19
2005299210203,4cyclictest0-21swapper/823:14:5438
2005299210203,4cyclictest0-21swapper/823:14:5438
2005299210203,4cyclictest0-21swapper/823:14:5438
200439920873,117cyclictest19582-21NetworkChangeNo23:35:200
200439920873,117cyclictest19582-21NetworkChangeNo23:35:200
2004399206191,7cyclictest0-21swapper/000:31:080
2004399206191,7cyclictest0-21swapper/000:31:080
2004399206191,7cyclictest0-21swapper/000:31:080
2007499205200,3cyclictest39907-21kworker/u81:0+events_unbound00:32:2519
2007499205200,3cyclictest39907-21kworker/u81:0+events_unbound00:32:2519
2007499205200,3cyclictest39907-21kworker/u81:0+events_unbound00:32:2419
2005699203189,8cyclictest0-21swapper/1222:34:134
2005699203189,8cyclictest0-21swapper/1222:34:134
2005699203189,8cyclictest0-21swapper/1222:34:134
200589920228,156cyclictest31081-21NetworkChangeNo23:20:205
200589920228,156cyclictest31081-21NetworkChangeNo23:20:205
2006499199192,5cyclictest0-21swapper/1722:06:379
2006499199192,5cyclictest0-21swapper/1722:06:379
2006499199192,5cyclictest0-21swapper/1722:06:379
2004399198163,15cyclictest171rcu_preempt22:21:540
2004399198163,15cyclictest171rcu_preempt22:21:540
2004399197191,5cyclictest0-21swapper/019:50:480
2004399197191,5cyclictest0-21swapper/019:50:480
2004399197120,62cyclictest4912-21CPU0
2004399197120,62cyclictest4912-21CPU0
2004399197120,62cyclictest4912-21CPU0
200889919673,41cyclictest9090-21inotify_reader20:30:1832
2005299195185,8cyclictest0-21swapper/800:18:1538
2005299195185,8cyclictest0-21swapper/800:18:1438
2005299195185,8cyclictest0-21swapper/800:18:1438
2004399195173,8cyclictest171rcu_preempt22:36:050
2004399195173,8cyclictest171rcu_preempt22:36:050
2004399195173,8cyclictest171rcu_preempt22:36:050
2005299194185,8cyclictest0-21swapper/800:28:0238
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional