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2026-03-14 - 17:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack6slot0.osadl.org (updated Sat Mar 14, 2026 13:02:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3733399215204,9cyclictest0-21swapper/109:11:521
3733399215204,9cyclictest0-21swapper/109:11:511
3733399211197,8cyclictest2454-21CPU1
3733399211197,8cyclictest2454-21CPU1
3733399211197,8cyclictest2454-21CPU1
3736399209177,30cyclictest0-21swapper/1411:22:426
3736399209177,30cyclictest0-21swapper/1411:22:416
3734099208200,6cyclictest30408-21cstates08:30:1438
3734099208200,6cyclictest30408-21cstates08:30:1438
3738499202199,2cyclictest0-21swapper/3208:05:2026
3738499202199,2cyclictest0-21swapper/3208:05:1926
3738799201179,11cyclictest0-21swapper/3409:32:5928
3738799201179,11cyclictest0-21swapper/3409:32:5928
3737599198171,18cyclictest0-21swapper/2507:19:2318
3733399198185,11cyclictest0-21swapper/111:30:371
3733399198185,11cyclictest0-21swapper/111:30:371
3733399198185,11cyclictest0-21swapper/111:30:371
3739299196185,9cyclictest0-21swapper/3912:34:3033
3739299196185,9cyclictest0-21swapper/3912:34:2933
3737799196184,10cyclictest0-21swapper/2711:20:4320
3737799196184,10cyclictest0-21swapper/2711:20:4320
3733399196186,5cyclictest0-21swapper/111:39:591
3733399196186,5cyclictest0-21swapper/111:39:591
3733399196186,5cyclictest0-21swapper/111:39:591
3737799195192,2cyclictest0-21swapper/2711:43:2320
3737799195192,2cyclictest0-21swapper/2711:43:2320
3737799195192,2cyclictest0-21swapper/2711:43:2320
37344991951,3cyclictest3547-21CPU2
37344991951,3cyclictest3547-21CPU2
37344991951,3cyclictest3547-21CPU2
3733599195162,28cyclictest0-21swapper/311:50:2023
3733599195162,28cyclictest0-21swapper/311:50:2023
3733599195162,28cyclictest0-21swapper/311:50:1923
3739299194190,2cyclictest1367-21dbus-daemon12:36:2733
3739299194190,2cyclictest1367-21dbus-daemon12:36:2733
3739299194190,2cyclictest1367-21dbus-daemon12:36:2633
3739299194179,8cyclictest0-21swapper/3909:32:5933
3739299194179,8cyclictest0-21swapper/3909:32:5933
3737999194172,19cyclictest2459-21CPU22
3737999194172,19cyclictest2459-21CPU22
3737599194169,10cyclictest0-21swapper/2511:48:2818
3737599194169,10cyclictest0-21swapper/2511:48:2818
3737599194169,10cyclictest0-21swapper/2511:48:2818
37363991941,4cyclictest755-21systemd-journal11:35:216
37363991941,4cyclictest755-21systemd-journal11:35:216
37363991941,4cyclictest755-21systemd-journal11:35:216
3733399194185,5cyclictest0-21swapper/111:09:021
3733399194185,5cyclictest0-21swapper/111:09:021
3737999193180,10cyclictest0-21swapper/2912:40:0722
3737999193180,10cyclictest0-21swapper/2912:40:0722
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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