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2026-09-11 - 14:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack6slot0.osadl.org (updated Fri Sep 11, 2026 13:03:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2670999219215,2cyclictest14238-21kworker/u81:0+events_unbound09:20:0737
2670999219215,2cyclictest14238-21kworker/u81:0+events_unbound09:20:0737
2670999219215,2cyclictest14238-21kworker/u81:0+events_unbound09:20:0637
2672899209202,5cyclictest0-21swapper/2409:30:2317
2672899209202,5cyclictest0-21swapper/2409:30:2317
2672499209201,6cyclictest0-21swapper/2010:07:3513
2672499209201,6cyclictest0-21swapper/2010:07:3413
2672499209201,6cyclictest0-21swapper/2010:07:3413
26710992081,196cyclictest38202-21run-parts10:30:2238
26710992081,196cyclictest38202-21run-parts10:30:2238
26710992081,196cyclictest38202-21run-parts10:30:2138
2672899207199,5cyclictest37257-21qemu-system-x8608:50:0917
2672899207199,5cyclictest37257-21qemu-system-x8608:50:0917
2672499207200,4cyclictest0-21swapper/2011:45:1313
2672499207200,4cyclictest0-21swapper/2011:45:1313
2673399206198,5cyclictest1384-21rs:main21
2673399206198,5cyclictest1384-21rs:main21
2673399206198,5cyclictest1384-21rs:main21
2672499206200,4cyclictest0-21swapper/2011:53:1113
2672499206200,4cyclictest0-21swapper/2011:53:1113
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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