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2022-11-27 - 00:40

x86 Intel Xeon E5-2650Lv2 @1700 MHz, Linux 4.18.7-rt5 (Profile)

Latency plot of system in rack #6, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Up99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack6slot0.osadl.org (updated Thu Oct 27, 2022 14:46:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2686299272241,20cyclictest37732-21sh09:50:4331
2686299272241,20cyclictest37732-21sh09:50:4331
2686299259237,16cyclictest0-21swapper/3711:25:2731
2686299259237,16cyclictest0-21swapper/3711:25:2731
2686299259237,16cyclictest0-21swapper/3711:25:2631
2686299258244,10cyclictest14500-21run-parts11:43:4631
2686299258244,10cyclictest14500-21run-parts11:43:4531
2686299250238,6cyclictest0-21swapper/3711:34:2731
2686299250238,6cyclictest0-21swapper/3711:34:2731
2686299248231,11cyclictest32141-21systemd-cgroups10:45:3731
2686299248231,11cyclictest32141-21systemd-cgroups10:45:3631
2686299243229,8cyclictest19426-21CPU31
2686299243229,8cyclictest19426-21CPU31
2686299243225,10cyclictest138450irq/36-eno1-TxR10:33:5331
2686299243225,10cyclictest138450irq/36-eno1-TxR10:33:5331
2686299242229,9cyclictest19425-21CPU31
2686299242229,9cyclictest19425-21CPU31
2686299241229,7cyclictest1354-21ModemManager10:53:3231
2686299241229,7cyclictest1354-21ModemManager10:53:3231
2686299241229,7cyclictest0-21swapper/3710:10:1131
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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