You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-31 - 05:19
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack6slot0.osadl.org (updated Mon Aug 31, 2026 01:01:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3774999193138,52cyclictest37357-21CPU3
3774999193138,52cyclictest37357-21CPU3
3773899192176,13cyclictest0-21swapper/223:47:2712
3773899192176,13cyclictest0-21swapper/223:47:2712
3773899192163,13cyclictest0-21swapper/223:54:3212
3773899192163,13cyclictest0-21swapper/223:54:3212
3778199184175,7cyclictest0-21swapper/3922:44:1733
3778199184175,7cyclictest0-21swapper/3922:44:1733
3778199184173,9cyclictest0-21swapper/3921:34:0733
3778199184173,9cyclictest0-21swapper/3921:34:0733
3778199184157,9cyclictest0-21swapper/3920:39:0233
3778199184157,9cyclictest0-21swapper/3920:39:0133
3773899183175,5cyclictest0-21swapper/200:30:4512
3773899183175,5cyclictest0-21swapper/200:30:4412
377419918096,56cyclictest37356-21CPU34
377419918096,56cyclictest37356-21CPU34
377419918096,56cyclictest37356-21CPU34
3774199180166,12cyclictest0-21swapper/421:50:0734
3774199180166,12cyclictest0-21swapper/421:50:0734
3773699179131,11cyclictest0-21swapper/123:24:381
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional