You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-08 - 13:55
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot2.osadl.org (updated Mon Dec 08, 2025 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
884324919,22sleep00-21swapper/018:59:530
885523716,13sleep10-21swapper/118:59:581
9099993628,7cyclictest245950irq/16-enp2s0f020:39:360
9099993534,0cyclictest245950irq/16-enp2s0f023:37:060
9100993433,0cyclictest185550irq/16-nvkm21:11:561
9100993432,1cyclictest245950irq/16-enp2s0f020:05:531
9100993432,1cyclictest167950irq/16-i91522:34:341
9100993432,1cyclictest167950irq/16-i91522:12:071
9100993432,1cyclictest167950irq/16-i91500:17:071
9099993433,0cyclictest245950irq/16-enp2s0f022:37:050
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional