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2025-12-01 - 16:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack6slot2.osadl.org (updated Mon Dec 01, 2025 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
160322650,1sleep016022-21munin-run10:32:000
181152448,28sleep00-21swapper/006:58:210
181152448,28sleep00-21swapper/006:58:210
184522428,8sleep10-21swapper/107:01:471
184522428,8sleep10-21swapper/107:01:471
18532993628,7cyclictest245950irq/16-enp2s0f007:12:140
18532993534,0cyclictest245950irq/16-enp2s0f007:34:500
18532993533,1cyclictest245950irq/16-enp2s0f011:17:190
18534993434,0cyclictest245950irq/16-enp2s0f008:41:581
18534993433,0cyclictest245950irq/16-enp2s0f011:37:361
18534993433,0cyclictest245950irq/16-enp2s0f011:21:101
18534993433,0cyclictest167950irq/16-i91510:34:171
18534993433,0cyclictest167950irq/16-i91509:57:111
18534993433,0cyclictest167950irq/16-i91508:50:141
18534993433,0cyclictest167950irq/16-i91507:37:161
18534993432,1cyclictest167950irq/16-i91510:53:111
18534993432,1cyclictest167950irq/16-i91509:22:111
18534993432,1cyclictest167950irq/16-i91507:42:161
18532993434,0cyclictest245950irq/16-enp2s0f010:57:170
18532993433,0cyclictest245950irq/16-enp2s0f009:57:080
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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