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2025-11-24 - 23:59
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack6slot2.osadl.org (updated Mon Nov 24, 2025 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
243132468,8sleep00-21swapper/006:58:140
242502439,8sleep10-21swapper/106:57:371
24752993932,6cyclictest245950irq/16-enp2s0f011:12:260
24752993932,6cyclictest245950irq/16-enp2s0f008:37:270
24752993932,6cyclictest245950irq/16-enp2s0f007:07:210
24752993931,7cyclictest245950irq/16-enp2s0f011:27:230
24752993832,5cyclictest245950irq/16-enp2s0f010:42:220
24752993832,5cyclictest245950irq/16-enp2s0f007:57:230
24752993831,6cyclictest245950irq/16-enp2s0f009:29:310
24752993825,12cyclictest245950irq/16-enp2s0f008:02:220
24752993732,4cyclictest245950irq/16-enp2s0f011:00:350
24752993732,4cyclictest245950irq/16-enp2s0f008:25:090
24752993732,4cyclictest245950irq/16-enp2s0f007:51:060
24752993731,5cyclictest245950irq/16-enp2s0f011:50:440
24752993731,5cyclictest245950irq/16-enp2s0f009:35:200
24752993731,5cyclictest245950irq/16-enp2s0f007:55:030
24752993730,6cyclictest245950irq/16-enp2s0f012:17:200
24752993730,6cyclictest245950irq/16-enp2s0f011:24:280
24752993730,6cyclictest245950irq/16-enp2s0f011:10:370
24752993730,6cyclictest245950irq/16-enp2s0f007:32:270
24752993730,6cyclictest245950irq/16-enp2s0f007:22:230
24753993634,1cyclictest167950irq/16-i91507:52:191
24752993633,2cyclictest245950irq/16-enp2s0f007:02:480
24752993632,3cyclictest245950irq/16-enp2s0f012:29:510
24752993631,4cyclictest245950irq/16-enp2s0f011:57:270
24752993631,4cyclictest245950irq/16-enp2s0f011:52:230
24752993631,4cyclictest245950irq/16-enp2s0f011:37:240
24752993631,4cyclictest245950irq/16-enp2s0f011:32:240
24752993631,4cyclictest245950irq/16-enp2s0f011:17:210
24752993631,4cyclictest245950irq/16-enp2s0f010:47:230
24752993631,4cyclictest245950irq/16-enp2s0f010:30:300
24752993631,4cyclictest245950irq/16-enp2s0f009:37:220
24752993631,4cyclictest245950irq/16-enp2s0f009:22:260
24752993631,4cyclictest245950irq/16-enp2s0f009:12:230
24752993631,4cyclictest245950irq/16-enp2s0f007:19:570
24752993630,5cyclictest245950irq/16-enp2s0f010:52:230
24752993630,5cyclictest245950irq/16-enp2s0f010:22:270
24752993630,5cyclictest245950irq/16-enp2s0f009:55:230
24752993630,5cyclictest245950irq/16-enp2s0f009:07:210
24752993630,5cyclictest245950irq/16-enp2s0f009:02:210
24752993630,5cyclictest245950irq/16-enp2s0f007:14:560
24752993629,6cyclictest245950irq/16-enp2s0f008:48:020
24752993533,1cyclictest167950irq/16-i91511:02:220
24752993532,3cyclictest245950irq/16-enp2s0f012:22:370
24752993532,3cyclictest245950irq/16-enp2s0f007:39:130
24752993531,3cyclictest245950irq/16-enp2s0f011:44:220
24752993531,3cyclictest245950irq/16-enp2s0f010:17:190
24752993531,3cyclictest245950irq/16-enp2s0f010:11:080
24752993531,3cyclictest245950irq/16-enp2s0f010:02:250
24752993531,3cyclictest245950irq/16-enp2s0f009:17:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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