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2025-11-30 - 21:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack6slot2.osadl.org (updated Sun Nov 30, 2025 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
100432488,8sleep00-21swapper/006:57:180
1076824212,8sleep10-21swapper/107:01:081
10917993730,5cyclictest245950irq/16-enp2s0f011:04:270
10917993634,1cyclictest245950irq/16-enp2s0f012:19:410
10917993634,1cyclictest245950irq/16-enp2s0f008:42:130
10918993535,0cyclictest167950irq/16-i91509:28:371
10917993534,0cyclictest245950irq/16-enp2s0f009:53:080
10917993532,1cyclictest245950irq/16-enp2s0f010:08:390
10918993433,0cyclictest167950irq/16-i91509:53:081
10917993433,0cyclictest245950irq/16-enp2s0f009:07:360
10917993433,0cyclictest245950irq/16-enp2s0f008:52:430
10917993433,0cyclictest245950irq/16-enp2s0f008:50:010
10917993433,0cyclictest245950irq/16-enp2s0f007:34:040
10917993433,0cyclictest245950irq/16-enp2s0f007:22:130
10917993433,0cyclictest245950irq/16-enp2s0f007:21:440
10917993432,1cyclictest245950irq/16-enp2s0f012:27:140
10917993432,1cyclictest245950irq/16-enp2s0f009:32:180
10917993432,1cyclictest245950irq/16-enp2s0f008:35:080
10917993432,1cyclictest245950irq/16-enp2s0f008:12:160
10917993432,1cyclictest245950irq/16-enp2s0f007:47:160
10918993332,0cyclictest245950irq/16-enp2s0f010:27:131
10918993332,0cyclictest245950irq/16-enp2s0f009:42:151
10918993332,0cyclictest245950irq/16-enp2s0f008:27:211
10918993332,0cyclictest167950irq/16-i91512:19:411
10918993332,0cyclictest167950irq/16-i91508:42:131
10918993332,0cyclictest167950irq/16-i91507:21:441
10918993331,1cyclictest167950irq/16-i91511:53:401
10918993331,1cyclictest167950irq/16-i91509:17:161
10918993331,1cyclictest167950irq/16-i91509:07:361
10918993331,1cyclictest167950irq/16-i91508:41:541
10918993331,1cyclictest167950irq/16-i91507:22:131
10917993332,0cyclictest245950irq/16-enp2s0f012:22:010
10917993332,0cyclictest245950irq/16-enp2s0f012:12:150
10917993332,0cyclictest245950irq/16-enp2s0f012:09:220
10917993332,0cyclictest245950irq/16-enp2s0f012:02:150
10917993332,0cyclictest245950irq/16-enp2s0f011:57:150
10917993332,0cyclictest245950irq/16-enp2s0f011:53:400
10917993332,0cyclictest245950irq/16-enp2s0f011:47:200
10917993332,0cyclictest245950irq/16-enp2s0f011:42:180
10917993332,0cyclictest245950irq/16-enp2s0f011:37:130
10917993332,0cyclictest245950irq/16-enp2s0f011:27:160
10917993332,0cyclictest245950irq/16-enp2s0f011:22:170
10917993332,0cyclictest245950irq/16-enp2s0f011:17:570
10917993332,0cyclictest245950irq/16-enp2s0f011:12:160
10917993332,0cyclictest245950irq/16-enp2s0f011:07:180
10917993332,0cyclictest245950irq/16-enp2s0f010:57:300
10917993332,0cyclictest245950irq/16-enp2s0f010:52:350
10917993332,0cyclictest245950irq/16-enp2s0f010:48:170
10917993332,0cyclictest245950irq/16-enp2s0f010:37:080
10917993332,0cyclictest245950irq/16-enp2s0f010:27:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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