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2026-08-05 - 19:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot5.osadl.org (updated Wed Aug 05, 2026 12:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
69019983624187,4132cyclictest27171-21kworker/0:007:14:150
69019964793473,2996cyclictest27171-21kworker/0:007:15:400
62972776185,203sleep00-21swapper07:05:350
69019955566,419cyclictest14198-31copy08:00:320
69019949665,250cyclictest11-21ksoftirqd/008:17:430
69019949052,438cyclictest0-21swapper12:13:070
69019948936,439cyclictest25341-21ssh09:18:360
69019948735,438cyclictest29137-21ssh09:36:380
69019948551,258cyclictest13-21rcuc/010:16:110
69019948532,439cyclictest25944-21ssh09:21:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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