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2026-02-24 - 10:09
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the highest latencies:
System rack6slot6 (updated Tue Feb 24, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
318659910725053420,53740cyclictest16896-21rm00:20:550
318659910719853432,53669cyclictest1828-21hald-addon-acpi20:02:100
318659910696553420,53453cyclictest0-21swapper20:50:240
318659910689553405,53490cyclictest0-21swapper21:43:500
318659910678053439,53277cyclictest134850irq/9-eth023:21:180
318659910676153413,53226cyclictest22682-21ssh21:23:540
318659910667753418,53194cyclictest134850irq/9-eth023:12:050
318659910666253413,53186cyclictest3950irq/9-acpi22:33:040
318659910665753446,53211cyclictest0-21swapper21:53:120
318659910659753411,53186cyclictest0-21swapper20:26:480
318659910652353441,53082cyclictest0-21swapper22:48:080
318659910652153477,53044cyclictest0-21swapper21:14:010
318659910651053478,53032cyclictest0-21swapper21:17:420
318659910646953473,52996cyclictest0-21swapper22:06:260
318659910646053464,52996cyclictest0-21swapper00:03:500
318659910645753393,53000cyclictest10-21rcuc/019:24:400
318659910642453457,52967cyclictest0-21swapper19:31:010
318659910624853383,52800cyclictest0-21swapper00:38:100
318659910623753387,52807cyclictest0-21swapper21:07:190
318659910618853417,52771cyclictest0-21swapper20:49:140
318659910618653414,52772cyclictest0-21swapper19:43:350
318659910615753403,52754cyclictest0-21swapper20:12:230
318659910577953296,52483cyclictest0-21swapper20:42:420
318659910577353299,52471cyclictest0-21swapper22:50:390
318659910556052926,52632cyclictest15084-21ssh23:32:010
318659910546252955,52505cyclictest8038-21ssh21:49:310
318659910544052946,52492cyclictest10308-21ssh00:11:420
318659910541653032,52382cyclictest25444-21ssh22:14:390
318659910537453005,52366cyclictest23505-21ssh23:45:050
318659910529052964,52323cyclictest32414-21ssh22:24:410
318659910526753058,52207cyclictest17910-21ssh23:35:420
318659910512853025,52098cyclictest0-21swapper21:28:050
31865995395827,53888cyclictest0-21swapper19:28:010
31865995389026,53767cyclictest12775-21diskmemload00:09:520
31865995372931,0cyclictest1907-21snmpd20:05:210
31865995354827,0cyclictest0-21swapper22:57:310
31865995340014,53383cyclictest0-21swapper19:54:580
31865995339225,53367cyclictest0-21swapper22:44:070
31865995312825,53103cyclictest0-21swapper19:46:060
31865995302224,52998cyclictest0-21swapper20:32:290
318659923221021,1206cyclictest9-21ksoftirqd/021:30:260
318659922621084,1111cyclictest31855-21cyclictest00:25:460
318659921571102,955cyclictest24699-21munin-node23:00:220
318659921311016,1022cyclictest480-21rm21:38:280
318659920751006,1030cyclictest13650-21ssh21:56:430
318659920401009,997cyclictest0-21swapper20:39:210
318659920171048,847cyclictest24619-21ssh00:32:280
31865992005979,989cyclictest4969-21ssh23:17:370
318659920001069,836cyclictest134850irq/9-eth022:00:140
31865991950964,972cyclictest0-21swapper19:38:440
318659919471057,823cyclictest30106-21kworker/0:123:58:280
31865991925939,972cyclictest0-21swapper19:56:290
31865991921951,956cyclictest0-21swapper20:56:360
31865991920928,978cyclictest0-21swapper20:23:060
318659919071009,807cyclictest31855-21cyclictest23:41:140
318659918571046,720cyclictest0-21swapper21:04:280
31865991848918,897cyclictest18631-1kworker/0:1H22:37:050
318659917901055,643cyclictest10-21rcuc/023:29:500
318659917431020,632cyclictest9-21ksoftirqd/023:50:060
318659917261022,609cyclictest28915-21ssh22:19:400
31865991640991,612cyclictest15066-21ssh00:19:250
318659915851038,547cyclictest0-21swapper22:27:520
31865991548716,828cyclictest0-21swapper23:08:040
318659913791024,323cyclictest0-21swapper20:18:550
31865991183616,564cyclictest18444-21hwlatdetect-tra19:11:260
31865991137594,541cyclictest22338-21hwlatdetect-tra19:18:380
30182870,1sleep03019-21wc19:08:190
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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