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2026-07-31 - 22:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Fri Jul 31, 2026 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
152169910703253412,53524cyclictest2099-21runrttasks09:33:000
152169910697153423,53457cyclictest0-21swapper07:22:020
152169910689053383,53444cyclictest3950irq/9-acpi10:16:120
152169910686653415,53362cyclictest15196-21cyclictest11:04:460
152169910675253414,53272cyclictest0-21swapper09:09:530
152169910672653437,53223cyclictest134850irq/9-eth011:59:520
152169910668253461,53221cyclictest0-21swapper11:53:000
152169910667453476,53198cyclictest0-21swapper08:54:290
152169910661853412,53116cyclictest9-21ksoftirqd/009:55:470
152169910660253443,53159cyclictest0-21swapper07:28:240
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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