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2025-12-10 - 07:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Wed Dec 10, 2025 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
233659910699753427,53474cyclictest6235-21ssh00:01:440
233659910673653417,53223cyclictest8257-21diskmemload22:22:350
233659910665753473,53119cyclictest0-21swapper20:20:300
233659910650653456,53050cyclictest0-21swapper21:12:050
233659910649253467,53025cyclictest0-21swapper20:11:480
233659910648353465,53018cyclictest0-21swapper22:08:510
233659910647953417,53062cyclictest0-21swapper21:59:290
233659910647053415,53055cyclictest0-21swapper21:40:330
233659910646453391,52984cyclictest20904-21kworker/0:221:33:410
233659910645553462,52993cyclictest0-21swapper00:36:040
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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