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2026-03-28 - 04:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Sat Mar 28, 2026 00:43:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
191699910686453469,53270cyclictest2099-21runrttasks20:15:580
191699910684053454,53290cyclictest9475-21ssh22:46:210
191699910673853479,53259cyclictest0-21swapper00:08:150
191699910669953429,53179cyclictest9-21ksoftirqd/000:34:020
191699910659553397,53198cyclictest0-21swapper00:15:570
191699910652353467,53056cyclictest0-21swapper20:39:050
191699910644353444,52999cyclictest0-21swapper20:11:070
191699910642053434,52986cyclictest0-21swapper21:51:160
191699910640953469,52875cyclictest9-21ksoftirqd/000:03:540
191699910619453468,52726cyclictest0-21swapper20:43:360
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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