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2026-06-18 - 10:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Thu Jun 18, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9969910729053420,53773cyclictest10766-21ssh00:07:040
9969910727653463,53691cyclictest12462-21ssh23:23:210
9969910686553469,53274cyclictest1907-21snmpd22:11:000
9969910680853439,53273cyclictest21301-21ssh22:01:580
9969910680253480,53322cyclictest0-21swapper22:44:400
9969910665553474,53181cyclictest0-21swapper19:35:560
9969910652353480,53043cyclictest0-21swapper23:29:030
9969910652353475,53048cyclictest0-21swapper20:53:280
9969910645653405,53051cyclictest0-21swapper21:37:110
9969910639053413,52977cyclictest0-21swapper21:41:320
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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