You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-04 - 09:01
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Fri Sep 04, 2026 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
110429910702953474,53459cyclictest7851-21diskmemload23:26:480
110429910691253466,53355cyclictest73512sleep019:50:160
110429910688653384,53413cyclictest25347-21ssh22:22:400
110429910681653413,53403cyclictest0-21swapper23:22:070
110429910668253377,53210cyclictest2099-21runrttasks20:00:290
110429910665153405,53157cyclictest11028-21cyclictest21:58:030
110429910662653383,53152cyclictest0-21swapper20:44:520
110429910660553475,53130cyclictest0-21swapper22:09:460
110429910660453476,53128cyclictest0-21swapper00:22:440
110429910656653417,53149cyclictest0-21swapper00:00:080
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional