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2026-09-06 - 11:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Sun Sep 06, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
57809910723253481,53687cyclictest3195-21kworker/u2:121:58:230
57809910701653456,53463cyclictest6401-21ssh22:38:040
57809910678453344,53416cyclictest31474-21sh21:41:180
57809910674753305,53429cyclictest0-21swapper23:36:310
57809910664053450,53190cyclictest0-21swapper00:35:280
57809910651353476,53037cyclictest0-21swapper00:04:290
57809910650753473,53034cyclictest0-21swapper21:06:380
57809910650053415,53085cyclictest0-21swapper20:35:290
57809910648553423,53062cyclictest0-21swapper22:03:240
57809910646153450,53011cyclictest0-21swapper22:34:430
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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