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2026-08-26 - 04:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Wed Aug 26, 2026 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1078799210864105384,105478cyclictest0-21swapper00:31:530
107879910699553407,53497cyclictest24718-21kworker/0:020:39:160
107879910690553408,53400cyclictest2099-21runrttasks21:06:240
107879910685353389,53398cyclictest0-21swapper21:31:010
107879910670853446,53171cyclictest9-21ksoftirqd/021:39:030
107879910651153472,53039cyclictest0-21swapper21:01:220
107879910649653469,53027cyclictest0-21swapper23:12:300
107879910649653421,53075cyclictest0-21swapper21:28:500
107879910649253430,53062cyclictest0-21swapper23:08:190
107879910648753462,53025cyclictest0-21swapper22:28:270
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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