You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-27 - 06:51
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Fri Mar 27, 2026 00:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
230629910707453396,53589cyclictest134850irq/9-eth000:04:490
230629910703253412,53528cyclictest0-21swapper00:07:500
230629910668053421,53193cyclictest0-21swapper20:31:480
230629910661553421,53131cyclictest9-21ksoftirqd/022:33:030
230629910656253425,53044cyclictest0-21swapper00:19:440
230629910654353417,53126cyclictest0-21swapper19:29:300
230629910649653466,53030cyclictest0-21swapper00:12:010
230629910648253463,53019cyclictest0-21swapper22:25:510
230629910647853462,53016cyclictest0-21swapper23:45:440
230629910646253468,52994cyclictest0-21swapper22:46:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional