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2025-05-09 - 06:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Fri May 09, 2025 00:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
100639910708653433,53562cyclictest8635-21rm21:18:220
100639910674653410,53245cyclictest0-21swapper20:47:330
100639910674153460,53185cyclictest196462sleep020:32:280
100639910668253461,53124cyclictest2103-21runrttasks20:41:410
100639910666953443,53136cyclictest9-21ksoftirqd/022:44:060
100639910665453407,53183cyclictest10050-21cyclictest00:34:380
100639910657753439,53138cyclictest0-21swapper20:15:440
100639910652053443,53077cyclictest0-21swapper19:46:150
100639910650653471,53035cyclictest0-21swapper00:02:090
100639910647653470,53006cyclictest0-21swapper20:57:360
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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