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2026-09-19 - 09:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Sat Sep 19, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2427699209822105337,104483cyclictest0-21swapper23:01:050
242769910712253391,53636cyclictest2099-21runrttasks19:27:230
242769910668453450,53234cyclictest0-21swapper21:02:000
242769910649653439,53057cyclictest0-21swapper20:22:190
242769910649453465,53029cyclictest0-21swapper20:57:190
242769910643353394,53039cyclictest0-21swapper20:52:080
242769910621053469,52741cyclictest0-21swapper19:50:000
242769910618453471,52713cyclictest0-21swapper19:42:170
242769910616953466,52703cyclictest0-21swapper20:11:360
242769910616253446,52716cyclictest0-21swapper21:19:150
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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