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2026-07-14 - 08:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Tue Jul 14, 2026 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
114309910693553405,53438cyclictest0-21swapper00:04:420
114309910691253479,53336cyclictest2272-21munin-node22:41:480
114309910668853418,53204cyclictest950ksoftirqd/023:34:230
114309910664453427,53127cyclictest3950irq/9-acpi00:36:510
114309910656553474,53091cyclictest0-21swapper20:05:330
114309910656353383,53090cyclictest0-21swapper21:32:180
114309910655553390,53100cyclictest0-21swapper19:48:480
114309910653853400,53138cyclictest0-21swapper23:29:520
114309910650553472,53033cyclictest0-21swapper21:58:260
114309910650453471,53033cyclictest0-21swapper00:05:520
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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