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2026-09-14 - 04:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Mon Sep 14, 2026 00:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
226949910690753408,53410cyclictest3950irq/9-acpi23:30:590
226949910660253406,53131cyclictest2206-1kworker/u3:100:13:510
226949910652453481,53043cyclictest0-21swapper21:38:460
226949910650853473,53035cyclictest0-21swapper21:27:330
226949910650553473,53032cyclictest0-21swapper21:56:420
226949910649453470,53024cyclictest0-21swapper19:56:570
226949910649053466,53024cyclictest0-21swapper23:24:570
226949910646253406,53056cyclictest0-21swapper23:15:040
226949910645253405,53047cyclictest0-21swapper20:22:040
226949910645053403,53047cyclictest0-21swapper23:48:440
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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