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2025-10-22 - 04:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Wed Oct 22, 2025 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
145609910730653438,53771cyclictest8149-21ssh22:54:390
145609910674653475,53149cyclictest10842-21rm00:29:170
145609910669653421,53275cyclictest0-21swapper19:13:460
145609910669553395,53236cyclictest133750irq/9-eth021:20:420
145609910664153469,53106cyclictest0-21swapper20:54:150
145609910660853408,53135cyclictest9-21ksoftirqd/022:08:360
145609910656053399,53099cyclictest9-21ksoftirqd/021:43:090
145609910654753388,53065cyclictest0-21swapper20:28:170
145609910654453385,53094cyclictest0-21swapper22:55:090
145609910650953389,53055cyclictest0-21swapper19:44:240
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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