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2026-04-04 - 10:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Sat Apr 04, 2026 00:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
190399910705153481,53473cyclictest14922-21ssh22:12:380
190399910698653438,53426cyclictest2099-21runrttasks20:30:290
190399910674353410,53242cyclictest0-21swapper00:27:370
190399910666653417,53156cyclictest0-21swapper19:59:300
190399910663353476,53067cyclictest9-21ksoftirqd/023:40:030
190399910661453409,53141cyclictest9-21ksoftirqd/019:29:410
190399910655453406,53084cyclictest0-21swapper22:22:210
190399910655053390,53095cyclictest0-21swapper23:11:350
190399910653853412,53035cyclictest0-21swapper23:38:030
190399910652153414,53041cyclictest0-21swapper22:05:360
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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