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2026-07-29 - 04:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Wed Jul 29, 2026 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
186739910976655075,54689cyclictest2679-21devkit-power-da20:09:490
186739910782453421,54317cyclictest14363-21sh23:41:400
186739910728253409,53752cyclictest25578-21ssh23:58:040
186739910718253476,53610cyclictest2099-21runrttasks21:58:500
186739910680153384,53325cyclictest0-21swapper22:55:060
186739910676053404,53260cyclictest3670-21diskmemload22:08:330
186739910662153424,53106cyclictest0-21swapper21:45:360
186739910660353389,53120cyclictest0-21swapper21:18:380
186739910657353464,53109cyclictest0-21swapper20:01:160
186739910656953413,53094cyclictest9-21ksoftirqd/020:22:220
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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