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2026-07-29 - 19:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Wed Jul 29, 2026 12:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
70629910711653409,53585cyclictest29899-21ssh11:39:160
70629910677753449,53328cyclictest0-21swapper10:34:580
70629910669553456,53174cyclictest9-21ksoftirqd/012:27:300
70629910664553391,53159cyclictest2099-21runrttasks08:58:000
70629910661153424,53187cyclictest0-21swapper10:39:190
70629910659953411,53188cyclictest0-21swapper08:18:490
70629910658653460,53126cyclictest0-21swapper07:12:400
70629910656153392,53169cyclictest0-21swapper12:32:020
70629910652853481,53047cyclictest0-21swapper09:21:370
70629910647253471,53001cyclictest0-21swapper08:22:100
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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