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2026-05-15 - 10:09
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Fri May 15, 2026 00:43:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2360999209913105365,104546cyclictest0-21swapper20:32:170
236099910711453473,53544cyclictest16849-21ssh23:44:020
236099910711353412,53636cyclictest28206-21kworker/u2:123:14:430
236099910710353457,53581cyclictest134850irq/9-eth022:46:150
236099910709453440,53531cyclictest14759-21ssh22:53:170
236099910679453459,53237cyclictest2099-21runrttasks20:14:010
236099910671953475,53152cyclictest0-21swapper20:52:520
236099910667453455,53148cyclictest134850irq/9-eth021:26:020
236099910664553464,53181cyclictest0-21swapper23:58:360
236099910659653460,53046cyclictest9-21ksoftirqd/023:31:580
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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