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2026-04-19 - 06:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Sun Apr 19, 2026 00:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
158149910691153411,53378cyclictest2099-21runrttasks22:26:340
158149910675953400,53359cyclictest0-21swapper21:18:150
158149910668853353,53311cyclictest18260-21ssh22:22:230
158149910655553393,53097cyclictest0-21swapper21:20:350
158149910654853383,53100cyclictest9-21ksoftirqd/019:46:580
158149910649553470,53025cyclictest0-21swapper23:28:520
158149910647453452,53022cyclictest0-21swapper22:41:090
158149910643253463,52969cyclictest0-21swapper23:17:390
158149910643053461,52969cyclictest0-21swapper20:16:070
158149910642953463,52966cyclictest0-21swapper00:21:070
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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