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2026-04-10 - 22:47
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Fri Apr 10, 2026 12:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
271399910703253469,53440cyclictest1994-21sendmail07:44:120
271399910698853448,53416cyclictest31821-21ssh12:02:060
271399910668653385,53238cyclictest31975-21kworker/0:209:54:590
271399910668353482,53201cyclictest0-21swapper11:50:330
271399910665653453,53203cyclictest0-21swapper11:13:120
271399910664853474,53084cyclictest9-21ksoftirqd/010:46:440
271399910662753392,53169cyclictest0-21swapper09:44:460
271399910661853418,53200cyclictest0-21swapper08:09:090
271399910661253470,53051cyclictest9-21ksoftirqd/009:14:080
271399910660253460,53076cyclictest0-21swapper10:15:550
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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