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2025-11-26 - 00:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Tue Nov 25, 2025 12:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
75509910720153447,53656cyclictest13069-21ssh10:22:500
75509910718853469,53629cyclictest9-21ksoftirqd/011:37:320
75509910691753463,53454cyclictest0-21swapper07:59:090
75509910688153395,53365cyclictest16921-21ssh11:13:150
75509910687153412,53439cyclictest0-21swapper11:22:470
75509910667053386,53220cyclictest5392-21kworker/0:309:29:450
75509910654253401,53141cyclictest0-21swapper07:15:260
75509910651453472,53042cyclictest0-21swapper08:16:240
75509910650453473,53031cyclictest0-21swapper11:41:330
75509910647953414,53065cyclictest0-21swapper11:54:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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