You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-17 - 20:48
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Mon Aug 17, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
11019910728253471,53711cyclictest15325-21ssh09:51:300
11019910720353468,53638cyclictest4078-21ssh11:58:260
11019910690053431,53403cyclictest19292-21rm09:57:410
11019910675953400,53359cyclictest0-21swapper11:23:160
11019910667553444,53231cyclictest0-21swapper10:15:570
11019910665553480,53086cyclictest9-21ksoftirqd/010:08:240
11019910660853386,53158cyclictest9-21ksoftirqd/010:36:430
11019910659653444,53152cyclictest0-21swapper07:44:130
11019910658753477,53046cyclictest9-21ksoftirqd/012:15:510
11019910656953387,53091cyclictest0-21swapper10:11:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional