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2026-06-29 - 20:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Mon Jun 29, 2026 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
133019910721153461,53629cyclictest2099-21runrttasks07:42:400
133019910715453435,53623cyclictest2099-21runrttasks07:25:050
133019910685353464,53389cyclictest0-21swapper08:21:010
133019910678753474,53221cyclictest13264-21cyclictest09:55:080
133019910673053398,53332cyclictest0-21swapper11:48:000
133019910671953330,53376cyclictest0-21swapper09:04:130
133019910667953472,53116cyclictest0-21swapper11:54:420
133019910664153385,53191cyclictest0-21swapper08:12:280
133019910656353394,53103cyclictest0-21swapper09:49:260
133019910655853431,53127cyclictest0-21swapper10:54:550
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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