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2025-06-29 - 01:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Sat Jun 28, 2025 12:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
219229910715453452,53606cyclictest19392-21ssh11:44:440
219229910676553436,53240cyclictest3950irq/9-acpi12:17:340
219229910673453337,53378cyclictest0-21swapper07:45:050
219229910669253432,53169cyclictest0-21swapper09:19:320
219229910667253475,53132cyclictest9-21ksoftirqd/011:29:200
219229910658353408,53110cyclictest0-21swapper11:49:360
219229910655753437,53056cyclictest9-21ksoftirqd/007:39:040
219229910650553454,53051cyclictest0-21swapper08:46:130
219229910649053362,53104cyclictest13366-21ssh12:20:450
219229910648553462,53023cyclictest0-21swapper09:24:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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