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2026-09-24 - 19:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Thu Sep 24, 2026 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
116889910735953399,53864cyclictest17738-21ssh10:22:150
116889910728653435,53754cyclictest29014-21ssh10:38:000
116889910691253409,53405cyclictest8547-21ssh10:54:450
116889910685753414,53347cyclictest2099-21runrttasks08:26:120
116889910655153390,53096cyclictest0-21swapper11:24:330
116889910654953388,53095cyclictest0-21swapper08:07:170
116889910654453387,53092cyclictest0-21swapper12:32:030
116889910649453466,53028cyclictest0-21swapper08:12:480
116889910645253444,53008cyclictest0-21swapper10:06:510
116889910645153401,53050cyclictest0-21swapper11:46:100
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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