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2026-06-11 - 08:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Thu Jun 11, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
149819910673453442,53292cyclictest0-21swapper20:06:400
149819910670353388,53252cyclictest3950irq/9-acpi22:59:300
149819910660853391,53151cyclictest0-21swapper23:37:510
149819910659553398,53133cyclictest9-21ksoftirqd/020:54:340
149819910653353384,53083cyclictest0-21swapper20:34:080
149819910650453469,53035cyclictest0-21swapper22:18:480
149819910649753471,53026cyclictest0-21swapper21:23:530
149819910647953459,53020cyclictest0-21swapper19:33:510
149819910646453454,53010cyclictest0-21swapper22:47:470
149819910642553442,52983cyclictest0-21swapper20:43:510
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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