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2026-05-04 - 16:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Mon May 04, 2026 12:43:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
246559910716353479,53588cyclictest2099-21runrttasks08:28:000
246559910668153422,53193cyclictest0-21swapper08:20:480
246559910664753428,53219cyclictest0-21swapper08:39:430
246559910662653432,53129cyclictest9-21ksoftirqd/007:34:340
246559910659453460,53134cyclictest0-21swapper11:59:010
246559910658753478,53045cyclictest9-21ksoftirqd/009:19:350
246559910658553404,53117cyclictest24651-21cyclictest11:54:590
246559910657353385,53096cyclictest0-21swapper07:14:290
246559910654853400,53148cyclictest0-21swapper12:19:060
246559910654753422,53125cyclictest0-21swapper09:25:460
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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