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2026-04-12 - 10:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Sun Apr 12, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
179709910755253482,53948cyclictest4809-21ssh21:10:390
179709910690953424,53393cyclictest7506-21ssh22:49:370
179709910685153430,53331cyclictest9-21ksoftirqd/023:47:240
179709910669353417,53276cyclictest0-21swapper23:15:450
179709910655253462,53090cyclictest0-21swapper19:40:430
179709910644853401,53047cyclictest0-21swapper22:15:270
179709910644153398,53043cyclictest0-21swapper20:18:340
179709910642753437,52990cyclictest0-21swapper22:57:200
179709910638253474,52816cyclictest0-21swapper20:28:470
179709910629353407,52886cyclictest0-21swapper21:09:280
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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