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2026-03-23 - 23:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Mon Mar 23, 2026 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2016899210059105378,104679cyclictest5188-21ssh12:24:130
201689910675153413,53272cyclictest0-21swapper11:21:150
201689910660653466,53140cyclictest0-21swapper08:19:230
201689910659153479,53112cyclictest0-21swapper08:51:420
201689910659053415,53175cyclictest0-21swapper08:25:550
201689910655053386,53098cyclictest0-21swapper12:04:070
201689910654453387,53064cyclictest0-21swapper07:34:000
201689910654153401,53140cyclictest0-21swapper07:52:550
201689910653353371,53098cyclictest9-21ksoftirqd/010:03:130
201689910652553452,53073cyclictest0-21swapper10:56:280
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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