You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-30 - 09:23
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Thu Apr 30, 2026 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
172749910721953465,53655cyclictest29838-21ssh23:21:530
172749910674053478,53262cyclictest0-21swapper22:17:150
172749910673653461,53275cyclictest0-21swapper23:04:580
172749910671253459,53156cyclictest3416-21ssh21:41:340
172749910668853389,53232cyclictest0-21swapper00:11:280
172749910660453403,53109cyclictest0-21swapper19:56:240
172749910659953440,53159cyclictest0-21swapper19:13:520
172749910656953437,53132cyclictest0-21swapper22:41:120
172749910654053442,53098cyclictest0-21swapper20:53:100
172749910649153462,53029cyclictest0-21swapper20:14:190
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional