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2026-09-05 - 10:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Sat Sep 05, 2026 00:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
254669910739053410,53858cyclictest27987-21ssh22:22:450
254669910670353410,53203cyclictest9-21ksoftirqd/020:41:460
254669910666353444,53154cyclictest0-21swapper23:06:480
254669910660453444,53160cyclictest0-21swapper23:34:050
254669910659053435,53155cyclictest0-21swapper21:17:460
254669910657153448,53031cyclictest0-21swapper22:07:400
254669910656053421,53073cyclictest0-21swapper23:56:020
254669910650153470,53031cyclictest0-21swapper22:01:190
254669910649353477,53016cyclictest0-21swapper19:13:500
254669910648253462,53020cyclictest0-21swapper19:19:020
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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