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2026-05-21 - 04:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Thu May 21, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
311589910757053447,54026cyclictest2099-21runrttasks21:04:250
311589910710053403,53601cyclictest14661-21ssh23:26:050
311589910661253478,53134cyclictest0-21swapper22:02:410
311589910656853452,53052cyclictest9-21ksoftirqd/023:57:140
311589910655553407,53148cyclictest0-21swapper20:43:280
311589910653753483,53054cyclictest0-21swapper22:15:150
311589910652553451,53010cyclictest134850irq/9-eth023:32:570
311589910652153480,53041cyclictest0-21swapper22:28:190
311589910651053435,53075cyclictest0-21swapper21:50:380
311589910649853475,53023cyclictest0-21swapper00:29:540
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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