You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-19 - 06:14
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Fri Dec 19, 2025 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
52479910732153468,53853cyclictest0-21swapper23:00:010
52479910721653435,53660cyclictest1907-21snmpd21:30:560
52479910693053475,53333cyclictest19372-21ssh22:33:340
52479910676853411,53265cyclictest0-21swapper20:17:550
52479910675453399,53355cyclictest0-21swapper21:49:510
52479910670053396,53184cyclictest27085-21diskmemload00:16:430
52479910667853465,53213cyclictest0-21swapper00:06:000
52479910666753477,53127cyclictest5239-21cyclictest22:13:080
52479910663753458,53179cyclictest0-21swapper20:05:110
52479910659353465,53128cyclictest0-21swapper19:51:270
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional