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2026-05-04 - 05:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Mon May 04, 2026 00:43:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
132679910729653447,53750cyclictest2099-21runrttasks22:08:010
132679910714453455,53592cyclictest27248-21ssh22:40:110
132679910704853437,53611cyclictest0-21swapper00:37:140
132679910693753387,53486cyclictest10-21rcuc/023:51:210
132679910677653467,53309cyclictest0-21swapper23:15:510
132679910663153470,53072cyclictest13263-21cyclictest19:33:370
132679910661453344,53270cyclictest0-21swapper00:24:310
132679910661053473,53014cyclictest9074-21ssh23:47:400
132679910658953444,53145cyclictest0-21swapper21:26:490
132679910658353441,53142cyclictest0-21swapper00:07:260
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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