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2026-06-10 - 05:09
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Wed Jun 10, 2026 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
301549910739253451,53819cyclictest2272-21munin-node00:28:510
301549910704053468,53508cyclictest30147-21cyclictest20:10:570
301549910668253410,53181cyclictest3950irq/9-acpi23:29:140
301549910666853518,53087cyclictest3950irq/9-acpi19:33:560
301549910664153413,53164cyclictest9-21ksoftirqd/021:09:540
301549910659853406,53100cyclictest0-21swapper20:43:060
301549910658753431,53066cyclictest3950irq/9-acpi23:04:470
301549910655153417,53043cyclictest0-21swapper21:23:580
301549910654953405,53144cyclictest0-21swapper20:34:540
301549910654453459,53085cyclictest0-21swapper23:38:060
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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