You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-14 - 02:15
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Wed May 13, 2026 12:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
272789910720553456,53627cyclictest26400-21ssh11:53:420
272789910704453404,53517cyclictest944-21ssh10:28:280
272789910699053409,53517cyclictest134850irq/9-eth010:20:150
272789910672853407,53230cyclictest9-21ksoftirqd/012:16:190
272789910664953470,53179cyclictest0-21swapper09:18:280
272789910663353416,53217cyclictest0-21swapper07:59:150
272789910662953393,53236cyclictest0-21swapper10:39:010
272789910656553426,53048cyclictest0-21swapper09:58:390
272789910652553469,53056cyclictest0-21swapper07:21:340
272789910645853407,53051cyclictest0-21swapper10:00:300
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional