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2025-12-09 - 07:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 10 highest latencies:
System rack6slot6 (updated Tue Dec 09, 2025 00:43:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
263169910685553387,53375cyclictest0-21swapper23:53:070
263169910679953430,53304cyclictest3950irq/9-acpi23:39:430
263169910653853474,53064cyclictest0-21swapper00:16:030
263169910652853339,53174cyclictest25816-21ssh22:12:080
263169910650853473,53035cyclictest0-21swapper20:47:230
263169910650553424,53015cyclictest7977-21kworker/0:222:37:450
263169910648253462,53020cyclictest0-21swapper21:17:320
263169910647953460,53019cyclictest0-21swapper20:36:000
263169910647053453,53017cyclictest0-21swapper23:26:090
263169910645753440,53017cyclictest0-21swapper20:53:350
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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