You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-20 - 13:00
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 20 highest latencies:
System rack6slot6 (updated Fri Feb 20, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
47759910676253444,53221cyclictest12829-21ssh21:43:510
47759910659953391,53117cyclictest9-21ksoftirqd/000:37:310
47759910658553472,53113cyclictest9-21ksoftirqd/019:39:050
47759910655753385,53105cyclictest0-21swapper20:15:350
47759910652953405,53033cyclictest0-21swapper21:48:320
47759910652753482,53045cyclictest0-21swapper22:17:300
47759910651053475,53035cyclictest0-21swapper00:29:180
47759910650353467,53036cyclictest0-21swapper22:08:280
47759910649653466,53030cyclictest0-21swapper23:14:370
47759910648653465,53021cyclictest0-21swapper23:16:170
47759910648353425,53058cyclictest0-21swapper23:32:020
47759910644553445,53000cyclictest0-21swapper19:23:300
47759910644153399,53042cyclictest0-21swapper19:17:080
47759910644153398,53043cyclictest0-21swapper22:57:120
47759910642453431,52993cyclictest0-21swapper22:26:330
47759910641153424,52987cyclictest0-21swapper00:14:540
47759910635753415,52850cyclictest0-21swapper21:33:180
47759910633353473,52748cyclictest0-21swapper20:58:380
47759910623553369,52802cyclictest9-21ksoftirqd/021:09:110
47759910622453475,52749cyclictest0-21swapper20:07:330
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional