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2025-11-26 - 16:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 20 highest latencies:
System rack6slot6 (updated Wed Nov 26, 2025 12:43:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
6399910751753473,53922cyclictest17459-21diskmemload09:52:460
6399910700553482,53400cyclictest9506-21ssh09:41:230
6399910699553421,53482cyclictest0-21swapper11:51:510
6399910653653474,53062cyclictest0-21swapper07:23:540
6399910651253427,53085cyclictest0-21swapper07:13:100
6399910649453468,53026cyclictest0-21swapper10:29:570
6399910649153468,53023cyclictest0-21swapper11:21:220
6399910649153465,53026cyclictest0-21swapper09:25:490
6399910648453419,53065cyclictest0-21swapper12:00:530
6399910645053381,53006cyclictest140650irq/7-b4307:59:340
6399910636353407,52865cyclictest0-21swapper07:15:310
6399910620053406,52794cyclictest0-21swapper08:38:350
6399910619353467,52726cyclictest0-21swapper08:45:070
6399910617153441,52730cyclictest0-21swapper08:18:490
6399910616853442,52726cyclictest0-21swapper07:33:360
6399910616853402,52766cyclictest0-21swapper10:02:190
6399910616053462,52698cyclictest0-21swapper08:29:020
6399910613453431,52703cyclictest0-21swapper08:11:470
6399910603453050,52981cyclictest28945-21ssh10:08:510
6399910601053034,52974cyclictest2022-21ssh12:29:110
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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