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2025-08-29 - 14:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 20 highest latencies:
System rack6slot6 (updated Fri Aug 29, 2025 12:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
273809910689353471,53332cyclictest3950irq/9-acpi12:34:420
273809910672853439,53289cyclictest0-21swapper09:30:390
273809910668953454,53235cyclictest0-21swapper07:47:390
273809910666953467,53157cyclictest3037-21ssh11:59:220
273809910666253460,53138cyclictest133750irq/9-eth011:52:100
273809910660153480,53030cyclictest0-21swapper07:41:380
273809910655653394,53097cyclictest0-21swapper10:53:130
273809910654253385,53092cyclictest0-21swapper07:16:100
273809910654153400,53141cyclictest0-21swapper08:32:420
273809910651353475,53038cyclictest0-21swapper10:45:110
273809910651053476,53034cyclictest0-21swapper12:37:530
273809910648553460,53025cyclictest0-21swapper08:09:160
273809910648253422,53060cyclictest0-21swapper10:57:040
273809910647453459,53015cyclictest0-21swapper12:06:540
273809910645953486,52973cyclictest0-21swapper11:14:390
273809910645553486,52969cyclictest0-21swapper11:25:020
273809910645253441,53011cyclictest0-21swapper09:20:260
273809910645053455,52995cyclictest0-21swapper08:04:340
273809910643753397,53040cyclictest0-21swapper11:42:070
273809910643253433,52999cyclictest0-21swapper10:03:490
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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