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2026-07-10 - 18:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 20 highest latencies:
System rack6slot6 (updated Fri Jul 10, 2026 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
127259910716453473,53691cyclictest0-21swapper11:16:460
127259910711753476,53641cyclictest0-21swapper07:31:310
127259910676253443,53319cyclictest0-21swapper10:55:300
127259910669353417,53187cyclictest134850irq/9-eth010:51:490
127259910666953400,53269cyclictest0-21swapper12:08:010
127259910665953390,53180cyclictest134850irq/9-eth009:44:490
127259910659053422,53102cyclictest9-21ksoftirqd/010:17:390
127259910657553460,53115cyclictest0-21swapper08:01:500
127259910657553448,53034cyclictest0-21swapper09:19:120
127259910657053430,53044cyclictest2099-21runrttasks11:46:240
127259910655053434,53053cyclictest134850irq/9-eth009:22:430
127259910653753401,53136cyclictest0-21swapper09:05:580
127259910651753480,53037cyclictest0-21swapper12:18:340
127259910651153475,53036cyclictest0-21swapper08:22:360
127259910648753467,53020cyclictest0-21swapper12:04:000
127259910648653466,53020cyclictest0-21swapper11:09:540
127259910647353412,53061cyclictest0-21swapper10:27:120
127259910647053453,53017cyclictest0-21swapper09:49:410
127259910646953452,53017cyclictest0-21swapper12:24:150
127259910645753467,52990cyclictest0-21swapper11:54:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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