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2026-03-30 - 09:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 20 highest latencies:
System rack6slot6 (updated Mon Mar 30, 2026 00:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
237119910682953452,53280cyclictest28417-21diskmemload21:33:130
237119910674153400,53277cyclictest3950irq/9-acpi00:12:280
237119910672653465,53261cyclictest0-21swapper20:15:400
237119910665253432,53220cyclictest0-21swapper23:08:000
237119910660653387,53156cyclictest9-21ksoftirqd/019:59:050
237119910659753467,53040cyclictest9-21ksoftirqd/021:36:240
237119910659453480,53050cyclictest9-21ksoftirqd/021:24:500
237119910658153375,53142cyclictest9-21ksoftirqd/022:44:430
237119910647853398,53080cyclictest0-21swapper20:01:160
237119910647453416,53058cyclictest0-21swapper20:08:280
237119910647253449,52959cyclictest3950irq/9-acpi22:00:300
237119910646953412,53057cyclictest0-21swapper22:26:280
237119910643153439,52992cyclictest0-21swapper20:52:210
237119910643153435,52996cyclictest0-21swapper23:02:280
237119910640253426,52976cyclictest0-21swapper23:37:480
237119910636953460,52818cyclictest0-21swapper19:50:030
237119910625853442,52700cyclictest0-21swapper20:32:050
237119910624353411,52832cyclictest0-21swapper20:40:270
237119910622053466,52718cyclictest0-21swapper20:48:100
237119910621653430,52786cyclictest0-21swapper20:22:520
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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