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2026-09-12 - 16:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 20 highest latencies:
System rack6slot6 (updated Sat Sep 12, 2026 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139329910679253332,53447cyclictest0-21swapper10:11:540
139329910666853481,53089cyclictest2701-21ssh09:15:070
139329910664253424,53154cyclictest9-21ksoftirqd/008:52:510
139329910660853475,53133cyclictest0-21swapper07:28:160
139329910660353445,53158cyclictest0-21swapper08:08:580
139329910659053394,53130cyclictest0-21swapper08:48:300
139329910656853395,53107cyclictest0-21swapper07:15:030
139329910656553453,53112cyclictest0-21swapper09:06:250
139329910651453480,53034cyclictest0-21swapper12:02:250
139329910650353473,53030cyclictest0-21swapper07:32:280
139329910649153469,53022cyclictest0-21swapper09:55:090
139329910648053437,53043cyclictest0-21swapper10:03:010
139329910647553457,53018cyclictest0-21swapper11:38:180
139329910646453456,53008cyclictest0-21swapper11:44:200
139329910646253451,53011cyclictest0-21swapper09:35:230
139329910645953472,52987cyclictest0-21swapper12:21:410
139329910645853445,53013cyclictest0-21swapper08:57:420
139329910645653448,53008cyclictest0-21swapper10:42:120
139329910639753414,52983cyclictest0-21swapper07:21:550
139329910639353430,52874cyclictest9-21ksoftirqd/009:50:580
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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