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2026-03-02 - 09:06
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 20 highest latencies:
System rack6slot6 (updated Mon Mar 02, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
65309910744253389,53958cyclictest26593-21rm23:34:000
65309910738853468,53855cyclictest134850irq/9-eth022:42:560
65309910675753477,53280cyclictest0-21swapper00:17:530
65309910663453416,53218cyclictest0-21swapper20:15:530
65309910663153417,53214cyclictest0-21swapper23:08:130
65309910654653439,53010cyclictest2099-21runrttasks20:08:010
65309910651953473,53046cyclictest0-21swapper21:50:510
65309910650753472,53035cyclictest0-21swapper23:43:430
65309910650453415,53089cyclictest0-21swapper22:39:450
65309910649353466,53027cyclictest0-21swapper21:31:450
65309910646653456,53010cyclictest0-21swapper20:13:020
65309910646053409,53051cyclictest0-21swapper21:22:120
65309910644553402,53043cyclictest0-21swapper23:45:540
65309910644453399,53045cyclictest0-21swapper22:23:300
65309910644053464,52976cyclictest0-21swapper20:00:390
65309910639853477,52857cyclictest3950irq/9-acpi23:22:570
65309910637153464,52843cyclictest9-21ksoftirqd/020:31:380
65309910630653457,52757cyclictest0-21swapper20:42:210
65309910625253382,52805cyclictest0-21swapper21:46:500
65309910619953407,52792cyclictest0-21swapper21:05:580
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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