You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-13 - 20:45
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 20 highest latencies:
System rack6slot6 (updated Fri Mar 13, 2026 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
215799910673453441,53293cyclictest0-21swapper10:33:540
215799910670753476,53231cyclictest0-21swapper12:06:000
215799910667053380,53227cyclictest3950irq/9-acpi11:32:400
215799910664053470,53170cyclictest0-21swapper11:51:060
215799910663753423,53214cyclictest0-21swapper10:21:000
215799910658853465,53123cyclictest0-21swapper12:25:360
215799910654853386,53097cyclictest0-21swapper09:28:250
215799910653653406,53064cyclictest0-21swapper12:19:140
215799910651253474,53038cyclictest0-21swapper08:31:280
215799910651253474,53038cyclictest0-21swapper07:41:040
215799910651053398,53112cyclictest0-21swapper08:54:150
215799910650953423,53022cyclictest11-21rcu_preempt07:21:080
215799910650753477,53030cyclictest0-21swapper11:11:340
215799910650553475,53030cyclictest0-21swapper07:50:160
215799910649153412,53079cyclictest0-21swapper11:43:030
215799910648553464,53021cyclictest0-21swapper10:19:090
215799910646653455,53011cyclictest0-21swapper11:59:580
215799910646553456,53009cyclictest0-21swapper07:13:360
215799910646353454,53009cyclictest0-21swapper07:32:310
215799910645653449,53007cyclictest0-21swapper09:08:590
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional