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2026-04-25 - 16:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 20 highest latencies:
System rack6slot6 (updated Sat Apr 25, 2026 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
104669910715353388,53674cyclictest9511-21kworker/u2:211:53:160
104669910680753396,53322cyclictest3950irq/9-acpi11:55:560
104669910669753456,53241cyclictest0-21swapper11:36:210
104669910651453475,53039cyclictest0-21swapper11:24:370
104669910651453414,53100cyclictest0-21swapper09:23:230
104669910648953462,53027cyclictest0-21swapper10:01:130
104669910645853407,53051cyclictest0-21swapper12:15:320
104669910645853406,53052cyclictest0-21swapper10:24:500
104669910639453451,52943cyclictest0-21swapper07:20:270
104669910636653386,52916cyclictest3950irq/9-acpi10:36:030
104669910631353410,52903cyclictest0-21swapper09:12:490
104669910625553385,52805cyclictest0-21swapper10:26:510
104669910620353468,52735cyclictest0-21swapper09:07:280
104669910616753429,52738cyclictest0-21swapper12:05:590
104669910615753401,52756cyclictest0-21swapper12:32:570
104669910615553396,52759cyclictest0-21swapper07:13:350
104669910615453437,52717cyclictest0-21swapper12:03:590
104669910615153443,52708cyclictest0-21swapper07:18:570
104669910615153440,52711cyclictest0-21swapper08:12:520
104669910611853423,52695cyclictest0-21swapper08:40:300
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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