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2026-07-23 - 03:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 20 highest latencies:
System rack6slot6 (updated Thu Jul 23, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139559910669353456,53173cyclictest9-21ksoftirqd/023:31:470
139559910664653423,53223cyclictest405-21ssh21:50:380
139559910660553458,53056cyclictest0-21swapper20:53:520
139559910660453400,53141cyclictest3950irq/9-acpi23:04:490
139559910655453392,53071cyclictest0-21swapper22:27:590
139559910654553385,53095cyclictest0-21swapper21:49:580
139559910653553474,53061cyclictest0-21swapper21:32:230
139559910648253450,53032cyclictest0-21swapper22:42:030
139559910646953325,53129cyclictest14019-21ssh23:47:020
139559910627653416,52772cyclictest0-21swapper20:32:150
139559910625453412,52751cyclictest0-21swapper20:22:030
139559910624953406,52751cyclictest0-21swapper23:40:500
139559910624453400,52844cyclictest0-21swapper23:19:440
139559910621253469,52743cyclictest0-21swapper20:42:590
139559910619053461,52729cyclictest0-21swapper23:52:530
139559910618153413,52768cyclictest0-21swapper22:48:250
139559910616453400,52764cyclictest0-21swapper20:36:070
139559910615253438,52714cyclictest0-21swapper19:52:440
139559910611553419,52696cyclictest0-21swapper20:10:090
139559910582653055,52768cyclictest27158-21ssh22:30:300
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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