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2026-08-27 - 15:21
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 376 highest latencies:
System rack6slot6 (updated Thu Aug 27, 2026 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
230629910672053475,53245cyclictest0-21swapper09:38:550
230629910669253397,53231cyclictest9-21ksoftirqd/009:34:140
230629910654453384,53095cyclictest0-21swapper10:18:170
230629910650053471,53029cyclictest0-21swapper10:38:320
230629910649953470,53029cyclictest0-21swapper08:05:180
230629910647953417,53062cyclictest0-21swapper11:59:460
230629910645753436,53021cyclictest0-21swapper08:49:210
230629910644253421,53021cyclictest0-21swapper07:13:330
230629910641153465,52946cyclictest0-21swapper07:30:280
230629910640253461,52941cyclictest0-21swapper08:41:190
230629910638853456,52932cyclictest0-21swapper08:04:280
230629910632753420,52907cyclictest0-21swapper08:30:460
230629910629053407,52883cyclictest0-21swapper10:22:280
230629910627853401,52764cyclictest0-21swapper08:58:240
230629910627553425,52786cyclictest0-21swapper10:13:350
230629910626053391,52869cyclictest0-21swapper07:50:340
230629910623853395,52843cyclictest0-21swapper09:07:060
230629910620953468,52741cyclictest0-21swapper07:41:410
230629910620853468,52740cyclictest0-21swapper07:57:360
230629910618653415,52771cyclictest0-21swapper11:30:070
230629910617353443,52730cyclictest0-21swapper08:50:310
230629910616053402,52758cyclictest0-21swapper07:22:560
230629910603852955,53081cyclictest0-21swapper11:35:390
230629910574053009,52729cyclictest8314-21ssh10:44:440
230629910554453035,52506cyclictest27711-21sh11:12:120
230629910538752933,52452cyclictest8415-21ssh12:19:110
23062995349128,326cyclictest0-21swapper11:07:010
23062995330427,53277cyclictest0-21swapper09:46:480
23062995329524,53271cyclictest0-21swapper09:27:420
23062995327328,0cyclictest20782-21ssh11:01:590
23062995324426,459cyclictest0-21swapper08:17:520
23062995311111,53098cyclictest0-21swapper10:47:050
23062995297452947,22cyclictest0-21swapper12:05:480
23062995277524,52751cyclictest0-21swapper11:52:240
230629925421102,1342cyclictest18569-21ssh10:59:380
230629923581047,1218cyclictest3950irq/9-acpi11:47:520
230629923441024,1320cyclictest0-21swapper12:00:160
230629921641030,1009cyclictest8804-21ssh09:57:210
230629921631060,636cyclictest9779-21ssh09:11:170
230629921201066,930cyclictest6550-21ssh11:29:070
230629920991005,916cyclictest0-21swapper07:39:510
230629920871030,1022cyclictest3967-21ssh12:11:590
230629920761056,1020cyclictest0-21swapper10:29:500
230629920711057,890cyclictest13405-21ssh10:04:530
230629920431071,846cyclictest14347-21ssh10:52:570
230629920401087,829cyclictest8072-21diskmemload12:33:050
230629919841053,837cyclictest0-21swapper08:38:080
230629919761040,814cyclictest0-21swapper07:46:230
230629919411037,810cyclictest0-21swapper09:42:360
230629919351033,809cyclictest0-21swapper09:01:550
23062991918997,901cyclictest0-21swapper12:22:220
230629918931087,715cyclictest9-21ksoftirqd/012:36:360
230629918681046,727cyclictest0-21swapper07:26:070
230629918181050,675cyclictest0-21swapper08:13:210
23062991781974,770cyclictest16162-21ssh10:08:240
230629917761100,611cyclictest3950irq/9-acpi11:41:100
23062991675842,817cyclictest30365-21ssh11:15:330
230629916391104,445cyclictest9-21ksoftirqd/011:24:360
230629916141006,541cyclictest0-21swapper07:17:040
23062991597985,576cyclictest14405-21ssh12:27:240
230629915721047,525cyclictest0-21swapper09:17:090
230629915321027,505cyclictest0-21swapper09:54:300
230629915081016,492cyclictest0-21swapper08:21:330
230629914921009,419cyclictest0-21swapper09:21:500
230629914901013,364cyclictest0-21swapper10:32:410
230629914621094,368cyclictest0-21swapper08:29:050
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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