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2026-04-12 - 17:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 50 highest latencies:
System rack6slot6 (updated Sun Apr 12, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
308419910673953475,53166cyclictest11733-21ssh12:16:000
308419910673953472,53203cyclictest9-21ksoftirqd/008:00:060
308419910661753439,53178cyclictest0-21swapper12:01:250
308419910661453424,53190cyclictest0-21swapper11:33:270
308419910661353472,53077cyclictest9-21ksoftirqd/010:06:020
308419910661053387,53159cyclictest9-21ksoftirqd/009:32:120
308419910652053405,53115cyclictest0-21swapper07:51:230
308419910651953472,53047cyclictest0-21swapper09:16:380
308419910650053428,53072cyclictest9-21ksoftirqd/009:59:300
308419910648553416,53069cyclictest0-21swapper08:17:510
308419910647753395,53020cyclictest3950irq/9-acpi10:33:100
308419910647153459,53012cyclictest0-21swapper07:59:560
308419910645953408,53051cyclictest0-21swapper12:10:480
308419910645653445,53011cyclictest0-21swapper10:35:510
308419910644453448,52996cyclictest0-21swapper07:47:520
308419910644053447,52993cyclictest0-21swapper12:35:450
308419910642553391,53034cyclictest0-21swapper10:04:220
308419910642153387,53034cyclictest0-21swapper11:29:160
308419910640653426,52980cyclictest0-21swapper11:38:390
308419910638053421,52959cyclictest0-21swapper09:53:080
308419910638053420,52960cyclictest0-21swapper07:11:320
308419910635753403,52954cyclictest0-21swapper07:27:470
308419910633253457,52875cyclictest0-21swapper08:14:500
308419910628053429,52851cyclictest0-21swapper12:08:270
308419910627353427,52846cyclictest0-21swapper08:21:220
308419910626853425,52843cyclictest0-21swapper08:59:330
308419910622553465,52725cyclictest0-21swapper07:22:250
308419910620853471,52737cyclictest0-21swapper07:30:470
308419910614953438,52711cyclictest0-21swapper09:01:130
308419910612253428,52694cyclictest0-21swapper07:38:100
308419910528252995,52284cyclictest15367-21ssh12:21:410
30841995378524,53668cyclictest9-21ksoftirqd/010:57:370
30841995369324,53669cyclictest0-21swapper11:06:400
30841995355024,452cyclictest0-21swapper10:49:450
30841995341826,53290cyclictest32762-21ssh10:23:070
30841995337827,576cyclictest9-21ksoftirqd/012:32:440
30841995321827,53191cyclictest0-21swapper08:43:280
30841995315326,53127cyclictest0-21swapper09:40:350
30841995308825,52972cyclictest0-21swapper10:50:250
30841995307627,53049cyclictest0-21swapper08:06:080
3084199530538,53043cyclictest28509-21ssh09:28:110
30841995293926,52913cyclictest0-21swapper08:46:590
30841995292825,52903cyclictest0-21swapper10:26:180
30841995290352893,8cyclictest25760-21ssh09:24:300
308419942602486,1772cyclictest2679-21devkit-power-da09:36:140
308419923771044,1203cyclictest15829-21diskmemload11:00:480
308419922021096,1008cyclictest8176-21ssh09:45:260
308419921031093,918cyclictest0-21swapper09:09:160
308419921021092,918cyclictest0-21swapper11:42:100
308419921011042,1025cyclictest0-21swapper11:52:230
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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