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2026-08-28 - 11:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Characteristics of the 50 highest latencies:
System rack6slot6 (updated Fri Aug 28, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
189919910694653383,53478cyclictest0-21swapper22:51:140
189919910675253456,53296cyclictest0-21swapper23:31:350
189919910674353436,53307cyclictest0-21swapper23:29:250
189919910664353384,53194cyclictest0-21swapper20:46:280
189919910653853410,53035cyclictest0-21swapper23:06:580
189919910647153441,53030cyclictest0-21swapper19:18:120
189919910646053435,53025cyclictest0-21swapper19:50:420
189919910645453445,53009cyclictest0-21swapper20:53:500
189919910644653446,53000cyclictest0-21swapper23:55:020
189919910644253400,53042cyclictest0-21swapper20:44:170
189919910642453354,53056cyclictest0-21swapper23:21:020
189919910641553427,52988cyclictest0-21swapper20:58:410
189919910629053389,52808cyclictest0-21swapper20:20:400
189919910627853393,52819cyclictest0-21swapper21:07:140
189919910621753475,52742cyclictest0-21swapper00:16:080
189919910621253469,52743cyclictest0-21swapper19:11:500
189919910620953471,52738cyclictest0-21swapper20:34:240
189919910617353451,52722cyclictest0-21swapper20:17:190
189919910615753461,52696cyclictest0-21swapper19:37:480
189919910614553436,52709cyclictest0-21swapper19:25:040
189919910613653054,53080cyclictest0-21swapper00:09:160
189919910613353433,52700cyclictest0-21swapper20:00:440
189919910606052976,53082cyclictest0-21swapper00:10:060
189919910602752953,53072cyclictest0-21swapper21:31:510
189919910584953034,52813cyclictest13834-21ssh22:07:210
189919910571353270,52439cyclictest0-21swapper21:25:490
189919910562852906,52720cyclictest22775-21ssh00:34:230
189919910551452966,52545cyclictest25548-21ssh21:39:430
189919910535752981,52373cyclictest32322-21ssh21:48:460
189919910529652959,52335cyclictest25186-21sh23:52:110
189919910516853061,52105cyclictest0-21swapper22:13:130
189919910511453008,52104cyclictest0-21swapper00:38:240
189919910508652986,52099cyclictest9-21ksoftirqd/021:22:180
189919910508652983,52101cyclictest0-21swapper21:12:550
189919910505452909,52143cyclictest0-21swapper22:23:560
189919910500552924,52079cyclictest0-21swapper23:15:410
18991995366224,53517cyclictest9-21ksoftirqd/021:02:120
18991995342028,53392cyclictest0-21swapper23:00:060
18991995333026,53304cyclictest0-21swapper19:45:100
18991995313126,53105cyclictest0-21swapper20:07:260
18991995312326,53097cyclictest0-21swapper19:32:560
18991995305526,53029cyclictest0-21swapper23:47:500
18991995276625,52741cyclictest0-21swapper20:14:280
189919952282720,2505cyclictest1741-21hald21:55:380
189919924721046,1328cyclictest4004-21diskmemload23:37:570
189919921891069,1054cyclictest3950irq/9-acpi22:01:290
18991992005981,1004cyclictest0-21swapper21:54:170
18991991961952,975cyclictest0-21swapper00:26:310
189919919261063,772cyclictest0-21swapper22:43:210
189919918241003,730cyclictest0-21swapper23:42:380
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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