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2025-11-04 - 08:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack6slot8.osadl.org (updated Tue Nov 04, 2025 00:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2563599779769,8cyclictest4927-21kerneloops22:53:000
2565799778769,7cyclictest4927-21kerneloops23:25:423
2564999754745,7cyclictest4927-21kerneloops23:12:142
2565799753747,5cyclictest4927-21kerneloops00:19:433
2565799753746,5cyclictest4927-21kerneloops21:01:143
2565799753745,7cyclictest4927-21kerneloops20:49:353
2565799752747,4cyclictest4927-21kerneloops23:41:383
2565799752745,5cyclictest4927-21kerneloops19:26:383
2564099752744,6cyclictest4927-21kerneloops00:39:001
2565799751744,6cyclictest4927-21kerneloops19:40:553
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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