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2026-08-13 - 04:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack6slot8.osadl.org (updated Thu Aug 13, 2026 00:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
62889812360,1225rtkit-daemon4793-21kerneloops19:07:073
2224499664657,5cyclictest4793-21kerneloops23:30:213
2224499663656,5cyclictest4793-21kerneloops23:43:333
2223299663656,5cyclictest4793-21kerneloops00:37:501
2222299663652,9cyclictest4793-21kerneloops22:33:250
2224499662655,6cyclictest4793-21kerneloops21:06:293
2224499662654,6cyclictest4793-21kerneloops00:38:523
2224499662654,6cyclictest4793-21kerneloops00:20:403
2223999661654,6cyclictest4793-21kerneloops20:45:562
2223299661655,5cyclictest4793-21kerneloops19:38:241
2223299661652,7cyclictest4793-21kerneloops21:36:551
2224499660657,2cyclictest4793-21kerneloops22:17:563
2224499660654,5cyclictest4793-21kerneloops19:23:453
2224499660651,7cyclictest4793-21kerneloops19:48:273
2222299660652,6cyclictest4793-21kerneloops23:42:210
2224499659652,5cyclictest4793-21kerneloops20:47:013
2223299659656,2cyclictest4793-21kerneloops23:41:291
2223299659652,5cyclictest4793-21kerneloops22:11:541
2222299659653,5cyclictest4793-21kerneloops00:21:230
2224499658653,4cyclictest4793-21kerneloops19:33:153
2224499658652,4cyclictest4793-21kerneloops20:55:333
2224499657655,1cyclictest4793-21kerneloops20:41:153
2224499657653,2cyclictest4793-21kerneloops21:46:513
2223999657651,5cyclictest4793-21kerneloops00:15:582
2223299657655,1cyclictest4793-21kerneloops23:56:081
2223299657655,1cyclictest4793-21kerneloops21:59:231
2223299657654,2cyclictest4793-21kerneloops20:16:051
2223299657649,6cyclictest4793-21kerneloops20:29:001
2224499656653,2cyclictest4793-21kerneloops22:36:493
2224499656653,2cyclictest4793-21kerneloops22:36:483
2224499656650,5cyclictest4793-21kerneloops19:37:093
2224499656649,6cyclictest4793-21kerneloops19:28:223
2223999656653,2cyclictest4793-21kerneloops22:46:152
2223299656654,1cyclictest4793-21kerneloops23:18:251
2223299656650,5cyclictest4793-21kerneloops00:16:201
2222299656648,7cyclictest4793-21kerneloops21:45:270
2224499655648,6cyclictest4793-21kerneloops22:34:173
2224499655647,6cyclictest4793-21kerneloops21:27:593
2223999655652,1cyclictest4793-21kerneloops21:26:072
2223999655649,4cyclictest4793-21kerneloops23:45:502
2223299655646,7cyclictest4793-21kerneloops00:08:241
2222299655649,5cyclictest4793-21kerneloops19:37:190
2224499654651,2cyclictest4793-21kerneloops22:10:513
2224499654647,5cyclictest4793-21kerneloops23:02:563
2223999654646,7cyclictest4793-21kerneloops22:21:442
2223299654651,2cyclictest4793-21kerneloops23:12:191
2223299654651,1cyclictest4793-21kerneloops00:33:221
2222299654647,5cyclictest4793-21kerneloops22:49:160
2222299654646,6cyclictest4793-21kerneloops23:11:260
2224499653647,5cyclictest4793-21kerneloops21:37:053
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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