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2026-03-16 - 13:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack6slot8.osadl.org (updated Mon Mar 16, 2026 00:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
227499637628,7cyclictest4793-21kerneloops23:25:273
227499634625,7cyclictest4793-21kerneloops21:28:033
227499633625,6cyclictest4793-21kerneloops22:20:303
226199633625,6cyclictest4793-21kerneloops23:40:121
227499632624,6cyclictest4793-21kerneloops19:25:243
225399632625,5cyclictest4793-21kerneloops22:05:200
225399632625,5cyclictest4793-21kerneloops22:05:200
225399632624,6cyclictest4793-21kerneloops23:58:070
227499631625,5cyclictest4793-21kerneloops22:19:303
227499631623,7cyclictest4793-21kerneloops22:52:113
226799631624,5cyclictest4793-21kerneloops20:28:042
226199631623,6cyclictest4793-21kerneloops00:22:381
225399631625,5cyclictest4793-21kerneloops22:44:140
227499630622,6cyclictest4793-21kerneloops19:59:433
226199630623,5cyclictest4793-21kerneloops23:03:471
227499629623,5cyclictest4793-21kerneloops19:39:253
227499629622,5cyclictest4793-21kerneloops23:51:483
226199629623,4cyclictest4793-21kerneloops19:35:301
225399629621,6cyclictest4793-21kerneloops00:36:160
227499628625,2cyclictest4793-21kerneloops23:02:323
227499628625,2cyclictest4793-21kerneloops20:29:503
227499628620,6cyclictest4793-21kerneloops19:41:483
226799628622,5cyclictest4793-21kerneloops19:53:182
226199628626,1cyclictest4793-21kerneloops21:25:341
226199628626,1cyclictest4793-21kerneloops19:48:521
226199628626,1cyclictest4793-21kerneloops00:07:301
226199628620,6cyclictest4793-21kerneloops22:44:471
225399628617,9cyclictest4793-21kerneloops00:21:450
227499627615,10cyclictest4793-21kerneloops22:09:073
227499627615,10cyclictest4793-21kerneloops22:09:073
226799627618,7cyclictest4793-21kerneloops22:02:322
226199627625,1cyclictest4793-21kerneloops22:48:081
226199627621,5cyclictest4793-21kerneloops21:33:551
225399627615,10cyclictest4793-21kerneloops23:50:530
227499626619,6cyclictest4793-21kerneloops21:41:433
227499626619,6cyclictest4793-21kerneloops20:24:433
226799626623,2cyclictest4793-21kerneloops20:49:462
226799626620,4cyclictest4793-21kerneloops23:31:142
226799626619,5cyclictest4793-21kerneloops20:41:092
226199626623,2cyclictest4793-21kerneloops22:04:171
226199626620,5cyclictest4793-21kerneloops22:53:471
227499625623,1cyclictest4793-21kerneloops23:34:223
227499625622,2cyclictest4793-21kerneloops23:23:083
227499625617,6cyclictest4793-21kerneloops21:53:373
226799625623,1cyclictest4793-21kerneloops19:35:402
226799625622,2cyclictest4793-21kerneloops21:10:592
226799625622,1cyclictest4793-21kerneloops23:39:202
226199625616,7cyclictest4793-21kerneloops21:52:021
227499624622,1cyclictest4793-21kerneloops23:36:433
227499624621,1cyclictest4793-21kerneloops19:47:393
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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