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2026-01-20 - 09:16
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack7slot2.osadl.org (updated Tue Jan 20, 2026 00:44:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
175103899112103,7cyclictest1771200-21kworker/u4:14+events_unbound21:27:570
17510389910695,8cyclictest1840026-21kworker/u4:8+events_unbound23:03:190
1751041999386,5cyclictest1809923-21kworker/u4:0+events_unbound21:58:021
1751041999380,5cyclictest1769939-21kworker/u4:11+events_unbound20:32:431
1751041998880,6cyclictest1887558-21kworker/u4:7+events_unbound23:38:311
1751038998778,6cyclictest1801153-21kworker/u4:0+events_unbound21:32:570
1751041998577,5cyclictest1764886-21kworker/u4:1+events_unbound20:02:331
1751041998375,6cyclictest1959704-21kworker/u4:8+events_unbound00:38:421
1751041998375,6cyclictest1778846-21kworker/u4:2+events_unbound20:57:471
1751041998367,6cyclictest1946845-21kworker/u4:15+events_unbound00:23:391
1751041998274,6cyclictest1766139-21kworker/u4:7+events_unbound20:12:371
1751038998274,6cyclictest1771200-21kworker/u4:14+events_unbound20:52:460
1751038998166,6cyclictest1930291-21kworker/u4:10+events_unbound00:03:340
1751041997972,5cyclictest1759836-21kworker/u4:8+events_unbound19:57:321
1751038997663,11cyclictest1848835-21kworker/u4:10+events_unbound22:28:100
1751041997365,5cyclictest1759836-21kworker/u4:8+events_unbound21:10:021
1751041997257,6cyclictest1752243-21kworker/u4:3+events_unbound19:22:261
1751038997265,5cyclictest1792402-21kworker/u4:0+events_unbound21:22:530
1751038997264,6cyclictest1759836-21kworker/u4:8+events_unbound19:50:010
1751038997260,6cyclictest1831231-21kworker/u4:13+events_unbound22:08:040
1751038997260,6cyclictest1831231-21kworker/u4:13+events_unbound22:08:040
1751041997049,13cyclictest1831231-21kworker/u4:13+events_unbound22:08:011
1751041997049,13cyclictest1831231-21kworker/u4:13+events_unbound22:08:001
1751041996760,5cyclictest1769939-21kworker/u4:11+events_unbound20:42:431
1751041996759,6cyclictest1784203-21kworker/u4:6+events_unbound21:17:531
1751041996745,5cyclictest1796781-21kworker/u4:11+events_unbound21:28:421
1751038996758,7cyclictest388-21dbus-daemon22:03:030
1751038996757,7cyclictest54-21kswapd022:25:000
1751041996658,6cyclictest1766138-21kworker/u4:6+events_unbound20:17:381
1751041996557,6cyclictest1756055-21kworker/u4:6+events_unbound19:52:321
1751041996548,8cyclictest1840023-21kworker/u4:3+events_unbound22:17:001
1751041996446,6cyclictest1856962-21kworker/u4:12+events_unbound22:40:011
1751038996451,4cyclictest1955400-21kworker/u4:2+events_unbound00:33:420
1751041996355,6cyclictest1769944-21kworker/u4:13+events_unbound21:02:491
1751041996347,7cyclictest1814324-21kworker/u4:1+events_unbound21:55:011
1751041996254,6cyclictest1753498-21kworker/u4:7+events_unbound19:17:261
1751041996244,6cyclictest1925945-21kworker/u4:2+events_unbound00:10:041
1751041996241,7cyclictest1862007-21kworker/u4:2+events_unbound23:18:131
1751041996239,7cyclictest1938860-21kworker/u4:6+events_unbound00:16:431
1751041996154,4cyclictest0-21swapper/123:55:121
1751038996154,5cyclictest1917353-21kworker/u4:4+events_unbound23:47:440
1751038996154,5cyclictest1848831-21kworker/u4:3+events_unbound22:35:230
1751038996153,6cyclictest1930291-21kworker/u4:10+events_unbound00:10:000
1751038996053,5cyclictest1853223-21kworker/u4:11+events_unbound22:53:160
1751038996052,6cyclictest1840021-21kworker/u4:0+events_unbound22:18:070
1751041995950,6cyclictest1917358-21kworker/u4:10+events_unbound23:48:321
1751038995951,6cyclictest1835608-21kworker/u4:1+events_unbound22:58:170
1751038995851,5cyclictest1796782-21kworker/u4:12+events_unbound21:37:560
1751038995849,7cyclictest1814324-21kworker/u4:1+events_unbound21:53:010
1751038995848,7cyclictest1856962-21kworker/u4:12+events_unbound23:08:010
1751041995746,7cyclictest37-21kcompactd021:47:121
1751041995744,5cyclictest1866399-21kworker/u4:14+events_unbound22:52:001
1751038995732,4cyclictest1783574-21kworker/u4:1+events_unbound21:16:590
1751041995649,5cyclictest1844462-21kworker/u4:7+events_unbound22:26:591
1751041995649,5cyclictest1753520-21kworker/u4:8+events_unbound19:32:281
1751038995646,7cyclictest54-21kswapd022:00:020
1751041995548,5cyclictest1055-21sshd22:33:111
1751038995549,5cyclictest1844462-21kworker/u4:7+events_unbound22:42:000
1751038995524,26cyclictest25550irq/23-42890000.ethernet23:55:100
1751041995447,5cyclictest1747366-21kworker/u4:10+events_unbound19:25:031
1751041995441,10cyclictest1751036-21cyclictest20:47:331
1751038995450,2cyclictest0-21swapper/000:15:280
1751038995446,6cyclictest1913071-21kworker/u4:14+events_unbound23:43:310
1751038995446,6cyclictest1835608-21kworker/u4:1+events_unbound23:13:220
1751038995446,6cyclictest1834449-21ntpq22:10:350
1751038995346,5cyclictest1920507-21ssh23:50:360
1751038995345,5cyclictest1890065-21gltestperf23:15:200
1751041995243,6cyclictest1799095-21/usr/sbin/munin21:30:161
1751041995241,9cyclictest471-21weston23:02:581
1751041995241,6cyclictest1955399-21kworker/u4:0+events_unbound00:33:341
1751041995238,12cyclictest0-21swapper/121:10:261
1751041995238,12cyclictest0-21swapper/121:10:261
1751038995245,5cyclictest1934571-21kworker/u4:3+events_unbound00:29:000
1751038995236,5cyclictest1930290-21kworker/u4:9+events_unbound00:15:000
1751038995230,20cyclictest1775111-21munin-plugin-st20:45:010
1751038995144,5cyclictest1752213-21unixbench_singl19:10:380
1751038995142,7cyclictest1762815-21fschecks_count19:55:180
1751038995141,7cyclictest1909350-21kworker/u4:10+events_unbound23:40:000
1751041995044,4cyclictest1814324-21kworker/u4:1+events_unbound22:04:001
1751041995040,5cyclictest1848835-21kworker/u4:10+events_unbound22:40:581
1751038995042,6cyclictest1864998-21diskmemload22:45:420
1751038995035,6cyclictest1742657-21kworker/u4:2+events_unbound19:10:000
175104199494,30cyclictest1899004-21ssh23:25:281
1751041994941,6cyclictest1931057-21sd-accept00:03:331
1751041994941,5cyclictest1831231-21kworker/u4:13+events_unbound22:11:001
1751041994938,9cyclictest1932693-21gltestperf00:05:221
1751041994934,10cyclictest1751150-21ls19:10:021
1751038994941,6cyclictest1808176-21gltestperf21:40:200
175104199485,35cyclictest1773260-21sshd20:35:291
1751041994840,6cyclictest1872597-21/usr/sbin/munin22:55:161
1751041994838,8cyclictest1794486-21latency_hist21:25:011
1751041994836,9cyclictest1758184-21ps19:35:331
1751038994841,5cyclictest1934571-21kworker/u4:3+events_unbound00:21:590
1751038994840,5cyclictest1780747-21sed21:05:200
1751038994826,20cyclictest1757767-21fschecks_count19:35:200
175104199479,32cyclictest1068-21snmpd00:27:321
1751041994739,5cyclictest1796782-21kworker/u4:12+events_unbound21:44:581
1751041994738,6cyclictest1759068-21fschecks_count19:40:201
1751041994721,20cyclictest0-21swapper/123:50:341
1751038994740,5cyclictest1772454-21kworker/u4:15+events_unbound21:11:590
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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