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2025-11-25 - 18:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack7slot2.osadl.org (updated Tue Nov 25, 2025 12:44:07)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
296738599153135,6cyclictest2977654-21kworker/u4:4+events_unbound08:10:371
296738599137128,7cyclictest2967310-21kworker/u4:1+events_unbound07:10:261
296738499130121,7cyclictest3016759-21kworker/u4:4+events_unbound09:40:510
296738599128121,5cyclictest2986772-21kworker/u4:17+events_unbound08:25:401
296738599126116,8cyclictest3054435-21kworker/u4:4+events_unbound10:35:191
296738599122114,6cyclictest3116535-21kworker/u4:4+events_unbound12:06:161
296738599122114,6cyclictest2993220-21kworker/u4:8+events_unbound09:20:001
296738499122117,3cyclictest2968617-21kworker/u4:16+events_unbound07:15:260
296738499122114,6cyclictest2986772-21kworker/u4:17+events_unbound09:15:470
296738599121101,7cyclictest2989343-21kworker/u4:0+events_unbound09:20:491
296738599120100,8cyclictest3047151-21kworker/u4:2+events_unbound10:30:171
296738499118110,6cyclictest3113408-21kworker/u4:1+events_unbound12:10:430
29673849911597,6cyclictest3109829-21kworker/u4:13+events_unbound11:56:120
296738499112104,5cyclictest3019947-21kworker/u4:5+events_unbound09:45:050
29673849911088,8cyclictest3054439-21kworker/u4:10+events_unbound10:40:200
296738499110102,6cyclictest3006454-21kworker/u4:14+events_unbound09:30:490
296738599109100,6cyclictest3124201-21kworker/u4:0+events_unbound12:15:441
29673859910597,6cyclictest2994501-21kworker/u4:9+events_unbound09:10:461
29673849910596,6cyclictest3128092-21kworker/u4:2+events_unbound12:25:470
29673849910497,5cyclictest2993218-21kworker/u4:1+events_unbound09:05:450
29673849910496,6cyclictest3036863-21kworker/u4:2+events_unbound10:10:550
29673859910295,5cyclictest3092152-21kworker/u4:6+events_unbound11:31:081
29673849910196,3cyclictest3068452-21kworker/u4:3+events_unbound11:06:030
29673849910191,7cyclictest3061476-21kworker/u4:1+events_unbound10:51:010
29673859910093,5cyclictest2986772-21kworker/u4:17+events_unbound10:15:561
29673849910079,10cyclictest3088679-21kworker/u4:5+events_unbound11:40:370
2967385999992,5cyclictest3039819-21kworker/u4:6+events_unbound10:25:561
2967385999891,5cyclictest3075146-21kworker/u4:4+events_unbound11:26:081
2967385999890,6cyclictest3128094-21kworker/u4:5+events_unbound12:30:471
2967385999890,6cyclictest3109826-21kworker/u4:9+events_unbound12:11:191
2967384999783,6cyclictest2977653-21kworker/u4:1+events_unbound07:59:450
2967384999689,5cyclictest3061478-21kworker/u4:6+events_unbound11:00:230
2967384999689,5cyclictest2975063-21kworker/u4:9+events_unbound07:44:430
2967384999688,6cyclictest3013270-21kworker/u4:7+events_unbound09:35:490
2967384999587,5cyclictest3068452-21kworker/u4:3+events_unbound10:56:010
2967385999486,6cyclictest2976366-21kworker/u4:11+events_unbound08:05:351
2967385999284,6cyclictest2957437-21kworker/u4:8+events_unbound07:19:361
2967385999282,7cyclictest3075144-21kworker/u4:2+events_unbound11:16:061
2967385999183,6cyclictest3095781-21kworker/u4:2+events_unbound11:36:081
2967385998880,6cyclictest3013265-21kworker/u4:0+events_unbound09:40:031
2967384998779,6cyclictest2977654-21kworker/u4:4+events_unbound08:44:540
2967385998679,5cyclictest3023418-21kworker/u4:8+events_unbound10:10:111
2967385998475,6cyclictest3013269-21kworker/u4:6+events_unbound09:35:031
2967384998475,4cyclictest25750irq/23-42890000.ethernet07:10:010
2967384998475,4cyclictest25750irq/23-42890000.ethernet07:10:000
2967384998274,6cyclictest2977653-21kworker/u4:1+events_unbound07:54:430
2967384998173,6cyclictest2991936-21kworker/u4:6+events_unbound09:00:470
2967384997971,5cyclictest2986772-21kworker/u4:17+events_unbound08:24:510
2967384997971,5cyclictest2986772-21kworker/u4:17+events_unbound08:24:510
2967385997863,6cyclictest2991937-21kworker/u4:7+events_unbound08:54:551
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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