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2026-02-05 - 07:16
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack7slot2.osadl.org (updated Thu Feb 05, 2026 00:44:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2939095999890,6cyclictest2945456-21kworker/u4:12+events_unbound19:45:230
2939095999778,7cyclictest2980863-21kworker/u4:8+events_unbound21:25:440
2939095999070,6cyclictest2951841-21kworker/u4:5+events_unbound21:00:400
2939095998980,6cyclictest3033866-21kworker/u4:21+events_unbound22:25:570
2939095998979,7cyclictest3120806-21kworker/u4:5+events_unbound00:08:220
2939095998880,6cyclictest2965827-21kworker/u4:6+events_unbound20:55:390
2939096998375,6cyclictest2960777-21kworker/u4:8+events_unbound20:35:361
2939095998375,6cyclictest2946710-21kworker/u4:14+events_unbound20:45:380
2939095998374,7cyclictest3038313-21kworker/u4:23+events_unbound22:30:580
2939095998364,17cyclictest3024913-21kworker/u4:1+events_unbound22:15:550
2939096997866,9cyclictest2930634-21kworker/u4:13+events_unbound20:00:291
2939095997870,6cyclictest3042739-21kworker/u4:2+events_unbound22:46:010
2939095997867,7cyclictest0-21swapper/022:00:270
2939095997769,6cyclictest3112598-21kworker/u4:2+events_unbound23:53:180
2939095997766,8cyclictest2980859-21kworker/u4:2+events_unbound21:30:450
2939096997570,3cyclictest3033859-21kworker/u4:15+events_unbound22:40:591
2939096997366,5cyclictest2946710-21kworker/u4:14+events_unbound20:40:361
2939095997365,6cyclictest2994285-21kworker/u4:12+events_unbound21:45:480
2939095997263,7cyclictest3120807-21kworker/u4:6+events_unbound00:13:350
2939095997260,5cyclictest3103740-21kworker/u4:3+events_unbound00:18:370
2939096996960,7cyclictest3064273-21kworker/u4:2+events_unbound23:05:001
2939095996962,5cyclictest3121449-21kworker/u4:9+events_unbound00:33:410
2939095996960,7cyclictest3142967-21kworker/u4:12+events_unbound00:28:400
2939095996759,6cyclictest3086599-21kworker/u4:5+events_unbound23:26:030
2939095996558,5cyclictest2945456-21kworker/u4:12+events_unbound20:30:340
2939095996456,6cyclictest2951841-21kworker/u4:5+events_unbound20:05:300
2939096996253,5cyclictest3141560-21ssh00:25:251
2939095996255,5cyclictest2951839-21kworker/u4:3+events_unbound20:20:010
2939095996243,8cyclictest2965845-21modprobe20:54:590
2939095995948,7cyclictest3101975-21fschecks_count23:40:190
2939095995851,5cyclictest2993635-21kworker/u4:10+events_unbound21:55:010
2939095995849,7cyclictest2942942-21kworker/u4:5+events_unbound19:50:270
2939095995740,13cyclictest0-21swapper/022:20:100
2939095995740,13cyclictest0-21swapper/022:20:090
2939096995648,5cyclictest3028430-21/usr/sbin/munin22:15:381
2939096995647,7cyclictest388-21dbus-daemon20:05:291
2939096995617,28cyclictest0-21swapper/123:25:301
2939096995617,15cyclictest3020783-21ssh22:07:271
2939095995646,7cyclictest2951839-21kworker/u4:3+events_unbound20:15:010
2939096995518,15cyclictest3053721-21ssh22:45:191
2939095995551,3cyclictest3073201-21kworker/u4:4+events_unbound23:35:030
2939095995547,6cyclictest2979952-21timerwakeupswit21:20:380
2939096995447,5cyclictest3076346-21switchtime23:10:371
2939096995445,7cyclictest3001569-21ntpq21:45:341
2939096995416,16cyclictest3110289-21ssh23:50:081
2939096995411,16cyclictest3046300-21ssh22:36:091
2939095995412,15cyclictest3067200-21ntpq23:00:250
2939096995346,5cyclictest2983463-21/usr/sbin/munin21:25:181
2939096995339,7cyclictest0-21swapper/100:30:531
2939096995317,12cyclictest2969844-21ssh21:10:031
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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