You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-07 - 15:22
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack7slot2.osadl.org (updated Sat Feb 07, 2026 12:44:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
220933299111103,6cyclictest2206767-21kworker/u4:2+events_unbound07:19:590
22093329910997,6cyclictest2312167-21kworker/u4:5+events_unbound10:35:360
22093329910090,7cyclictest2342370-21kworker/u4:2+events_unbound11:10:400
22093329910088,9cyclictest2277519-21kworker/u4:5+events_unbound10:05:340
22093329910088,9cyclictest2277519-21kworker/u4:5+events_unbound10:05:340
2209332999991,6cyclictest2390129-21kworker/u4:17+events_unbound12:10:470
2209332999581,5cyclictest2346768-21kworker/u4:8+events_unbound11:20:410
2209332999385,6cyclictest2398850-21kworker/u4:4+events_unbound12:30:510
2209332999183,6cyclictest2364392-21kworker/u4:12+events_unbound12:05:460
2209332999083,5cyclictest2316587-21kworker/u4:11+events_unbound10:50:370
2209333998836,30cyclictest2314430-21aten_r7power_en10:35:161
2209332998780,5cyclictest2364392-21kworker/u4:12+events_unbound11:40:450
2209333998538,27cyclictest2218404-21acpi07:45:121
2209333998538,27cyclictest2218404-21acpi07:45:121
2209332998574,8cyclictest2403217-21kworker/u4:6+events_unbound12:25:500
2209332998375,6cyclictest2325383-21kworker/u4:12+events_unbound11:05:410
2209332998372,5cyclictest25550irq/23-42890000.ethernet07:10:000
2209332998071,7cyclictest2232183-21kworker/u4:8+events_unbound08:55:010
2209332998071,7cyclictest2232183-21kworker/u4:8+events_unbound08:55:010
2209332998065,8cyclictest2376988-21kworker/u4:1+events_unbound11:55:460
2209332997975,2cyclictest2281937-21kworker/u4:1+events_unbound10:10:350
2209332997770,5cyclictest2298903-21kworker/u4:8+events_unbound10:30:350
2209332997669,5cyclictest2210540-21kworker/u4:6+events_unbound07:45:050
2209332997669,5cyclictest2210540-21kworker/u4:6+events_unbound07:45:050
2209333997439,32cyclictest2354423-21timerandwakeup11:20:361
2209333997361,9cyclictest2235978-21kworker/u4:18+events_unbound09:20:261
2209333997361,9cyclictest2235978-21kworker/u4:18+events_unbound09:20:261
2209333997327,43cyclictest0-21swapper/110:15:131
2209333997240,28cyclictest2264212-21kworker/u4:0-rpciod09:40:381
2209332997160,8cyclictest2273088-21kworker/u4:4+events_unbound10:00:000
2209332997060,8cyclictest2403218-21kworker/u4:7+events_unbound12:25:000
2209332997058,10cyclictest2239770-21kworker/u4:4+events_unbound09:39:450
2209332996963,4cyclictest2199584-21kworker/u4:17+events_unbound08:05:000
2209333996835,31cyclictest2309697-21munin-run10:30:001
2209333996835,30cyclictest2327683-21fschecks_time10:50:201
2209333996736,28cyclictest2387721-21latency_hist12:00:041
2209333996732,31cyclictest0-21swapper/109:35:271
2209333996553,9cyclictest2224614-21kworker/u4:20+events_unbound08:15:151
2209333996531,31cyclictest0-21swapper/111:00:271
220933299656,57cyclictest0-21swapper/011:45:330
2209333996456,6cyclictest2151348-21kworker/u4:10+events_unbound07:25:001
2209333996434,25cyclictest2342370-21kworker/u4:2-xprtiod11:15:321
2209333996431,30cyclictest0-21swapper/112:20:331
2209332996452,5cyclictest2403216-21kworker/u4:5+events_unbound12:18:560
2209332996448,7cyclictest2351191-21kworker/u4:4+events_unbound11:18:000
2209333996356,5cyclictest2316584-21kworker/u4:8+events_unbound10:45:361
2209333996336,22cyclictest2285008-21switchtime10:00:381
220933399633,17cyclictest2362727-21diskmemload11:30:291
2209333996331,30cyclictest0-21swapper/110:20:411
2209333996329,31cyclictest2340850-21cat11:05:211
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional