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2026-03-09 - 04:25
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #2

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack7slot2s.osadl.org (updated Mon Mar 09, 2026 00:48:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
291138799336191,107cyclictest0-21swapper/000:01:390
291138799332189,107cyclictest0-21swapper/000:15:450
291138799330191,101cyclictest0-21swapper/023:31:360
291138799328192,100cyclictest0-21swapper/021:45:470
291138799328192,100cyclictest0-21swapper/021:45:470
291138799328189,103cyclictest0-21swapper/000:06:060
291138799328189,103cyclictest0-21swapper/000:06:060
291138799324183,105cyclictest0-21swapper/023:25:460
291138799324183,105cyclictest0-21swapper/023:25:460
291138799324180,105cyclictest0-21swapper/021:50:430
291138799324180,105cyclictest0-21swapper/021:50:430
291138799323141,141cyclictest0-21swapper/023:16:490
291138799323141,141cyclictest0-21swapper/023:16:490
291138799320190,97cyclictest171rcu_preempt00:20:110
291138799320190,97cyclictest171rcu_preempt00:20:110
291138799317156,123cyclictest0-21swapper/023:35:310
291138799317156,123cyclictest0-21swapper/023:35:310
291138799316173,105cyclictest0-21swapper/021:25:410
291138799316173,105cyclictest0-21swapper/021:25:400
291138799316149,118cyclictest2917988-21timerwakeupswit19:46:540
291138799315139,137cyclictest0-21swapper/019:43:160
291138799315138,138cyclictest0-21swapper/023:46:530
291138799314141,135cyclictest0-21swapper/020:15:380
291138799314141,135cyclictest0-21swapper/020:15:380
291138799313163,113cyclictest2950765-21timerwakeupswit22:37:060
291138799313163,113cyclictest2950765-21timerwakeupswit22:37:060
291138799313155,114cyclictest0-21swapper/021:11:150
291138799313155,114cyclictest0-21swapper/021:11:150
291138799313148,117cyclictest2931400-21diskmemload22:22:590
291138799313148,117cyclictest2931400-21diskmemload22:22:590
291138799312177,98cyclictest0-21swapper/022:55:000
291138799312177,98cyclictest0-21swapper/022:55:000
291138799311141,130cyclictest0-21swapper/023:11:550
291138799311141,130cyclictest0-21swapper/023:11:550
291138799311138,132cyclictest0-21swapper/000:10:440
291138799309150,123cyclictest2921824-21ntpq20:11:100
291138799309141,129cyclictest0-21swapper/019:50:510
291138799309137,120cyclictest0-21swapper/000:26:590
291138799308146,111cyclictest0-21swapper/020:10:040
291138799307181,91cyclictest171rcu_preempt21:40:030
291138799307181,91cyclictest171rcu_preempt21:40:020
291138799307149,116cyclictest0-21swapper/000:35:470
291138799307149,116cyclictest0-21swapper/000:35:470
291138799307138,122cyclictest0-21swapper/023:59:590
291138799307138,122cyclictest0-21swapper/000:00:000
291138799306134,134cyclictest0-21swapper/022:46:010
291138799306134,134cyclictest0-21swapper/022:46:000
291138799305145,109cyclictest0-21swapper/020:40:040
291138799305139,114cyclictest0-21swapper/021:05:050
291138799304146,110cyclictest0-21swapper/022:55:340
291138799304146,110cyclictest0-21swapper/022:55:340
291138799304140,111cyclictest0-21swapper/021:16:580
291138799304140,111cyclictest0-21swapper/021:16:570
291138799304121,139cyclictest2918561-21kworker/u9:7+rpciod20:41:500
291138799303145,110cyclictest0-21swapper/022:10:500
291138799303145,110cyclictest0-21swapper/022:10:500
291138799303133,121cyclictest2943851-21ntpq22:06:070
291138799303133,121cyclictest2943851-21ntpq22:06:070
291138799303128,128cyclictest0-21swapper/019:40:010
291138799302149,98cyclictest0-21swapper/019:25:100
291138799302144,110cyclictest0-21swapper/021:31:140
291138799302144,110cyclictest0-21swapper/021:31:130
291138799302144,107cyclictest0-21swapper/000:30:470
291138799302144,107cyclictest0-21swapper/000:30:470
291138799300124,131cyclictest2946538-21kworker/u9:6+rpciod22:32:260
291138799300124,131cyclictest2946538-21kworker/u9:6+rpciod22:32:260
291138799299163,84cyclictest171rcu_preempt19:11:010
291138799299163,84cyclictest171rcu_preempt19:11:010
291138799299145,106cyclictest0-21swapper/020:51:380
291138799299145,106cyclictest0-21swapper/020:51:370
291138799298167,87cyclictest171rcu_preempt20:01:330
291138799298142,104cyclictest0-21swapper/020:00:040
291138799296144,108cyclictest2955879-21ntp_offset23:01:220
291138799292146,100cyclictest0-21swapper/020:30:440
291138799292129,118cyclictest0-21swapper/023:51:420
291138799292129,118cyclictest0-21swapper/023:51:420
291138799291127,119cyclictest0-21swapper/022:40:450
291138799291127,119cyclictest0-21swapper/022:40:450
291138799290143,102cyclictest0-21swapper/023:44:450
291138799290137,109cyclictest0-21swapper/023:05:420
291138799290137,109cyclictest0-21swapper/023:05:420
291138799290136,108cyclictest0-21swapper/020:55:300
291138799289139,108cyclictest0-21swapper/020:46:200
291138799289125,119cyclictest0-21swapper/020:30:030
291138799286174,83cyclictest171rcu_preempt19:10:050
291138799286174,83cyclictest171rcu_preempt19:10:050
291138799286141,102cyclictest0-21swapper/022:04:400
291138799286141,102cyclictest0-21swapper/022:04:390
291138799285136,104cyclictest0-21swapper/022:17:440
291138799283127,109cyclictest0-21swapper/019:35:070
291138799282136,101cyclictest0-21swapper/019:25:030
291138799282122,120cyclictest0-21swapper/021:58:280
291138799282122,120cyclictest0-21swapper/021:58:270
291138799281120,118cyclictest0-21swapper/021:45:020
291138799281120,118cyclictest0-21swapper/021:45:010
291138799277154,107cyclictest0-21swapper/023:22:050
291138799277154,107cyclictest0-21swapper/023:22:050
291138799275113,121cyclictest0-21swapper/021:06:100
291138799275113,121cyclictest0-21swapper/021:06:100
291138799271161,93cyclictest0-21swapper/021:25:050
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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