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2025-07-01 - 04:39

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #2

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack7slot2s.osadl.org (updated Tue Jul 01, 2025 00:48:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
252353399282166,76cyclictest0-21swapper/020:11:500
252353399279177,71cyclictest171rcu_preempt20:15:540
252353399278166,79cyclictest0-21swapper/000:26:350
252353399278166,79cyclictest0-21swapper/000:26:350
252353399276189,70cyclictest0-21swapper/019:16:270
252353399276189,70cyclictest0-21swapper/019:16:270
252353399276174,68cyclictest171rcu_preempt22:11:240
252353399276174,68cyclictest171rcu_preempt22:11:230
252353399273145,94cyclictest2523532-21cyclictest23:35:060
252353399272167,69cyclictest171rcu_preempt20:53:530
252353399272167,69cyclictest171rcu_preempt20:53:530
252353399271165,81cyclictest0-21swapper/023:06:170
25235339927095,109cyclictest2558839-21apt22:20:350
25235339927095,109cyclictest2558839-21apt22:20:350
252353399270179,63cyclictest171rcu_preempt23:27:220
252353399269169,65cyclictest171rcu_preempt23:55:200
252353399269169,65cyclictest171rcu_preempt23:55:200
252353399269169,63cyclictest171rcu_preempt00:06:240
252353399269169,63cyclictest171rcu_preempt00:06:240
252353399269163,66cyclictest2554180-21kworker/u9:0+rpciod22:00:570
252353399269163,66cyclictest2554180-21kworker/u9:0+rpciod22:00:570
252353399268166,70cyclictest171rcu_preempt22:30:300
252353399268166,70cyclictest171rcu_preempt22:30:300
252353399268160,84cyclictest2523805-21diskstats19:10:390
252353399268160,84cyclictest2523805-21diskstats19:10:380
252353399267173,63cyclictest171rcu_preempt22:42:070
252353399267169,64cyclictest171rcu_preempt21:05:010
252353399266166,67cyclictest171rcu_preempt21:36:590
252353399265167,67cyclictest171rcu_preempt21:18:120
252353399265156,83cyclictest0-21swapper/019:51:030
252353399265156,83cyclictest0-21swapper/019:51:030
252353399264175,62cyclictest171rcu_preempt23:36:160
252353399264175,62cyclictest171rcu_preempt23:36:160
252353399264173,61cyclictest171rcu_preempt21:05:360
252353399264173,61cyclictest171rcu_preempt21:05:360
252353399264162,69cyclictest0-21swapper/021:11:070
252353399263166,65cyclictest171rcu_preempt22:06:580
252353399263166,65cyclictest171rcu_preempt22:06:570
252353399263166,63cyclictest171rcu_preempt20:45:060
252353399263162,67cyclictest171rcu_preempt00:35:190
252353399263162,67cyclictest171rcu_preempt00:35:180
252353399263160,69cyclictest2577474-21cat23:46:330
252353399263160,69cyclictest2577474-21cat23:46:330
252353399262167,65cyclictest171rcu_preempt21:41:340
252353399262167,64cyclictest171rcu_preempt23:51:160
252353399262167,64cyclictest171rcu_preempt23:51:160
252353399262165,83cyclictest2529803-21/usr/sbin/munin19:46:080
252353399262165,83cyclictest2529803-21/usr/sbin/munin19:46:080
252353399262164,63cyclictest171rcu_preempt00:20:310
252353399262164,63cyclictest171rcu_preempt00:20:310
252353399262162,69cyclictest171rcu_preempt22:25:390
252353399261166,64cyclictest171rcu_preempt00:31:410
252353399261163,66cyclictest171rcu_preempt21:51:300
252353399261160,65cyclictest171rcu_preempt21:30:510
252353399261160,65cyclictest171rcu_preempt21:30:510
252353399260166,63cyclictest171rcu_preempt20:00:410
252353399260160,62cyclictest171rcu_preempt20:35:060
252353399260160,62cyclictest171rcu_preempt20:35:060
252353399260133,81cyclictest2563435-21kworker/u9:5+rpciod23:04:180
252353399259166,62cyclictest171rcu_preempt23:42:580
252353399259166,62cyclictest171rcu_preempt23:42:580
252353399259143,69cyclictest2562332-21/usr/sbin/munin22:36:260
252353399257171,68cyclictest2583479-21ssh00:16:570
252353399257171,68cyclictest2583479-21ssh00:16:570
252353399257169,53cyclictest171rcu_preempt21:21:550
252353399257169,53cyclictest171rcu_preempt21:21:550
252353399257166,60cyclictest171rcu_preempt20:20:520
252353399257163,64cyclictest171rcu_preempt20:30:050
252353399257163,64cyclictest171rcu_preempt20:30:050
252353399257153,90cyclictest244-21dhcpcd22:49:050
252353399257150,93cyclictest2577926-21kworker/u9:8+rpciod00:00:260
252353399257133,79cyclictest2504796-21kworker/u9:2-rpciod19:10:060
252353399257133,79cyclictest2504796-21kworker/u9:2-rpciod19:10:050
252353399255162,65cyclictest171rcu_preempt23:17:140
252353399255162,65cyclictest171rcu_preempt23:17:140
252353399255159,68cyclictest171rcu_preempt22:55:030
252353399254163,63cyclictest171rcu_preempt19:44:220
252353399254163,63cyclictest171rcu_preempt19:44:220
252353399254158,64cyclictest171rcu_preempt22:16:050
252353399254158,64cyclictest171rcu_preempt22:16:050
252353399254157,58cyclictest171rcu_preempt22:58:110
252353399253144,67cyclictest171rcu_preempt19:21:530
252353399252161,64cyclictest171rcu_preempt23:22:230
252353399252161,64cyclictest171rcu_preempt23:22:230
252353399252159,62cyclictest171rcu_preempt20:10:070
252353399251163,59cyclictest171rcu_preempt21:49:100
252353399251150,63cyclictest171rcu_preempt21:00:070
252353399250149,68cyclictest171rcu_preempt19:30:320
252353399249162,60cyclictest171rcu_preempt19:55:130
252353399249159,62cyclictest171rcu_preempt19:26:500
252353399249149,68cyclictest0-21swapper/023:11:180
252353399248152,82cyclictest2553434-21ssh21:55:210
252353399248152,82cyclictest2553434-21ssh21:55:210
252353399247146,71cyclictest0-21swapper/000:12:010
252353399246161,58cyclictest171rcu_preempt20:50:040
252353399246161,58cyclictest171rcu_preempt20:50:040
252353399245152,63cyclictest2528211-21/usr/sbin/munin19:36:510
252353399245152,63cyclictest2528211-21/usr/sbin/munin19:36:500
252353399244119,73cyclictest0-21swapper/020:35:380
252353399239118,90cyclictest2547144-21irqstats21:25:470
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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