You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-06-16 - 21:44

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #7, slot #2

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack7slot2s.osadl.org (updated Sat Jun 06, 2026 00:48:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
225524399275170,70cyclictest0-21swapper/020:40:360
225524399261177,52cyclictest2292936-21grep22:31:250
225524399260145,81cyclictest0-21swapper/023:15:490
225524399260145,81cyclictest0-21swapper/023:15:490
225524399258163,57cyclictest0-21swapper/021:25:450
225524399257163,78cyclictest151ktimers/022:59:230
225524399257163,78cyclictest151ktimers/022:59:230
225524399256169,56cyclictest0-21swapper/021:10:000
225524399256169,56cyclictest0-21swapper/021:10:000
225524399254167,54cyclictest0-21swapper/020:20:470
225524399252165,41cyclictest171rcu_preempt23:20:120
225524399252161,75cyclictest716-21lldpd20:10:320
225524399251158,59cyclictest171rcu_preempt21:00:060
225524399251146,90cyclictest2301491-21ntp_offset23:11:270
225524399250158,57cyclictest171rcu_preempt00:37:120
225524399250158,57cyclictest171rcu_preempt00:37:110
225524399249182,36cyclictest171rcu_preempt19:22:050
225524399249176,42cyclictest171rcu_preempt19:31:470
225524399249176,42cyclictest171rcu_preempt19:31:470
225524399249152,76cyclictest2295549-21kworker/u10:3-rpciod22:55:080
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional