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2025-11-18 - 13:46

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #2

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack7slot2s.osadl.org (updated Tue Nov 18, 2025 00:48:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
288861699282169,99cyclictest2899769-21irqstats20:15:500
288861699271186,57cyclictest2952901-21ntp_states00:36:510
288861699271186,57cyclictest2952901-21ntp_states00:36:510
288861699270149,70cyclictest0-21swapper/020:35:010
288861699267158,72cyclictest0-21swapper/022:41:330
288861699267158,72cyclictest0-21swapper/022:41:330
288861699265187,48cyclictest171rcu_preempt00:31:290
288861699265187,48cyclictest171rcu_preempt00:31:290
288861699260186,57cyclictest2938366-21kworker/u10:2-rpciod23:35:010
288861699260186,57cyclictest2938366-21kworker/u10:2-rpciod23:35:010
288861699260185,40cyclictest171rcu_preempt21:15:300
288861699260185,40cyclictest171rcu_preempt21:15:300
288861699259173,57cyclictest0-21swapper/022:21:480
288861699259173,57cyclictest0-21swapper/022:21:470
288861699257185,58cyclictest0-21swapper/023:05:350
288861699257156,86cyclictest2927279-21ntpq22:36:350
288861699257156,86cyclictest2927279-21ntpq22:36:340
288861699255159,83cyclictest2941321-21ssh23:42:020
288861699254162,77cyclictest0-21swapper/021:41:190
288861699253178,43cyclictest14-21ksoftirqd/020:09:270
288861699253147,72cyclictest2888615-21cyclictest21:21:460
288861699253147,72cyclictest2888615-21cyclictest21:21:450
288861699252183,56cyclictest9150irq/87-eth%d00:11:040
288861699252183,56cyclictest9150irq/87-eth%d00:11:030
288861699251182,41cyclictest171rcu_preempt00:02:010
288861699251182,41cyclictest171rcu_preempt00:02:010
288861699251160,56cyclictest0-21swapper/021:55:340
288861699251159,77cyclictest0-21swapper/020:00:010
288861699251159,77cyclictest0-21swapper/020:00:010
288861699251153,83cyclictest0-21swapper/000:20:060
288861699248157,74cyclictest14-21ksoftirqd/023:23:060
288861699248143,91cyclictest717-21lldpd21:05:280
288861699248143,91cyclictest2944398-21ntp_states23:56:470
288861699247156,57cyclictest0-21swapper/022:11:060
288861699247156,57cyclictest0-21swapper/022:11:050
288861699247155,57cyclictest171rcu_preempt20:37:040
288861699246181,52cyclictest0-21swapper/000:25:560
288861699246155,77cyclictest0-21swapper/021:31:390
288861699246155,77cyclictest0-21swapper/021:31:390
288861699244176,55cyclictest0-21swapper/022:25:400
288861699244176,55cyclictest0-21swapper/022:25:390
288861699244172,42cyclictest171rcu_preempt00:22:120
288861699243174,57cyclictest0-21swapper/000:05:560
288861699243174,57cyclictest0-21swapper/000:05:560
288861699243162,66cyclictest0-21swapper/021:52:110
288861699243160,67cyclictest0-21swapper/021:25:580
288861699243160,67cyclictest0-21swapper/021:25:570
288861699243157,69cyclictest0-21swapper/022:31:510
288861699243157,69cyclictest0-21swapper/022:31:510
288861699242158,68cyclictest0-21swapper/022:01:570
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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