You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-02 - 04:21
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 50 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack7slot3.osadl.org (updated Mon Feb 02, 2026 00:44:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28981283722sleep28980-21munin-node0
2987399243175cyclictest23150-21threads21:00:160
2987399236207cyclictest30971-21munin-node0
2987399234163cyclictest798-21munin-node0
2987399233208cyclictest30175-21sort19:09:220
2987399231206cyclictest3184-21munin-node0
2987399230202cyclictest10227-21ssh00:34:560
2987399230165cyclictest23213-21ssh23:15:330
2987399229198cyclictest18615-21ssh22:57:330
11356222818sleep11357-21latency_hist22:29:190
2987399223199cyclictest30794-21munin-run21:33:410
2987399221197cyclictest2726-21lxpanel23:57:550
2987399221161cyclictest11631-21ntp_offset20:09:520
18477222014sleep18478-21proc_pri20:40:010
2987399219192cyclictest14970-21munin-run22:43:460
2987399218193cyclictest8640-21latency_hist22:18:370
2987399218192cyclictest30696-21munin-node0
2987399218192cyclictest15532-21latency22:45:210
2987399218192cyclictest12724-21modprobe20:14:480
2987399217193cyclictest6015-21cron00:18:380
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional