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2026-03-02 - 18:43
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #3

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack7slot3s.osadl.org (updated Mon Mar 02, 2026 12:43:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28137991027,78cyclictest12206-21unixbench_multi10:51:090
2813799982,79cyclictest0-21swapper/009:26:070
2813799942,78cyclictest0-21swapper/011:36:000
2813799898,61cyclictest23898-21cat09:56:030
2813799892,66cyclictest1990-21latency_hist11:55:430
2813799882,71cyclictest0-21swapper/009:20:430
2813799882,70cyclictest21230-21grep11:16:100
2813799882,70cyclictest21230-21grep11:16:100
2813799871,75cyclictest31089-21switchtime08:46:090
2813799871,66cyclictest0-21swapper/010:26:030
2813799871,63cyclictest4512-21latency_hist07:35:430
2813799862,69cyclictest0-21swapper/007:12:240
2813799841,46cyclictest18378-21latency_hist12:40:440
2813799801,62cyclictest10845-21tr09:20:570
2813799796,62cyclictest0-21swapper/008:30:500
2813799781,4cyclictest31543-21kworker/u8:210:20:490
2813799771,60cyclictest11312-21aten_rbpower_en12:20:560
2813799771,60cyclictest11312-21aten_rbpower_en12:20:560
2813799771,4cyclictest31925-21modprobe10:17:430
2813799765,62cyclictest0-21swapper/009:15:440
2813799762,51cyclictest0-21swapper/007:35:570
2813799762,51cyclictest0-21swapper/007:35:570
28137997619,45cyclictest6620-21aten_rbpower_en07:40:580
2813799761,60cyclictest28394-21/usr/sbin/munin08:41:070
54512750,3sleep20-21swapper/207:36:062
54512750,3sleep20-21swapper/207:36:062
28137997510,48cyclictest9342-21latency_hist12:15:440
2813799741,4cyclictest9038-21ntpq07:46:050
2813799731,5cyclictest0-21swapper/011:47:350
28143997216,39cyclictest1000-21latency_hist07:25:441
2813799722,57cyclictest0-21swapper/011:44:300
2813799722,55cyclictest0-21swapper/012:09:420
2813799721,4cyclictest46312sleep009:01:540
2813799712,51cyclictest0-21swapper/009:31:300
28137997116,43cyclictest18550-21fschecks_count11:10:590
28137997114,42cyclictest21629-21cut09:50:580
85122700,2sleep20-21swapper/212:11:092
2813799703,4cyclictest2819-21latency_hist07:30:440
28137997026,29cyclictest7850irq/56-dwc_otg_08:30:440
2813799696,52cyclictest10833-21taskset12:18:320
2813799695,51cyclictest9420-21taskset10:45:590
28137996923,33cyclictest7850irq/56-dwc_otg_07:25:430
2813799691,4cyclictest31495-21taskset07:20:100
2813799691,4cyclictest0-21swapper/011:58:300
2813799691,4cyclictest0-21swapper/008:17:160
2814399686,10cyclictest7950irq/56-dwc_otg_11:56:111
28137996818,27cyclictest0-21swapper/010:01:100
2813799681,4cyclictest115932sleep007:54:160
2813799678,41cyclictest0-21swapper/012:26:070
2813799678,41cyclictest0-21swapper/012:26:070
28137996720,44cyclictest15542-21sensors_temp11:01:100
2813799671,5cyclictest0-21swapper/011:24:390
28137996715,30cyclictest0-21swapper/008:00:480
2813799671,4cyclictest0-21swapper/011:33:080
2813799671,4cyclictest0-21swapper/008:35:550
28143996619,34cyclictest1125-21runrttasks12:20:581
28143996619,34cyclictest1125-21runrttasks12:20:581
2813799667,47cyclictest0-21swapper/007:56:540
2813799665,51cyclictest25054-21chrt11:27:360
2813799662,6cyclictest0-21swapper/010:34:430
2814399651,29cyclictest0-21swapper/112:35:561
2813799656,49cyclictest872-21runrttasks08:51:260
2813799651,4cyclictest174312sleep009:36:590
2813799651,3cyclictest64582sleep009:07:130
2813799651,3cyclictest224052sleep008:22:490
2813799641,5cyclictest0-21swapper/009:45:280
2813799641,4cyclictest171402sleep008:09:490
2813799641,4cyclictest171402sleep008:09:490
2813799641,3cyclictest0-21swapper/011:08:050
148712640,3sleep337-21rcuc/312:30:553
299772630,4sleep22814799cyclictest10:11:112
2813799631,4cyclictest0-21swapper/010:12:370
2813799631,4cyclictest0-21swapper/008:59:150
2813799621,4cyclictest0-21swapper/010:45:290
2813799621,4cyclictest0-21swapper/009:47:490
2814399615,9cyclictest7950irq/56-dwc_otg_11:11:031
2814399615,4cyclictest7950irq/56-dwc_otg_11:36:091
2813799612,50cyclictest0-21swapper/012:32:050
2813799611,4cyclictest0-21swapper/010:56:360
2813799611,4cyclictest0-21swapper/008:14:400
2813799611,3cyclictest284552sleep010:09:320
2813799611,3cyclictest284552sleep010:09:320
242772610,2sleep30-21swapper/311:26:023
2814999601,7cyclictest7950irq/56-dwc_otg_12:40:443
2813799601,4cyclictest0-21swapper/012:01:410
263092603,48sleep00-21swapper/007:05:480
2814999591,24cyclictest13272-21ls10:56:023
2814399595,12cyclictest7950irq/56-dwc_otg_07:30:571
28137995912,27cyclictest0-21swapper/010:36:030
2814399587,9cyclictest7950irq/56-dwc_otg_09:20:491
2814399583,10cyclictest7950irq/56-dwc_otg_10:21:001
2814399572,7cyclictest9502-21sed07:46:111
2814399571,13cyclictest0-21swapper/110:46:001
2814999561,14cyclictest0-21swapper/309:26:173
2814399562,13cyclictest26939-21sort08:36:001
2814399561,5cyclictest3006-21cat10:26:101
2814399554,5cyclictest9450irq/48-DMA10:44:551
2814399553,4cyclictest5500-21ps07:36:071
2814399553,4cyclictest5500-21ps07:36:071
2814399552,15cyclictest0-21swapper/109:56:071
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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