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2026-03-19 - 03:19

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack7slot4s.osadl.org (updated Thu Mar 19, 2026 00:45:14)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1151999635,20cyclictest12-21ksoftirqd/022:45:130
1152499574,10cyclictest131rcu_preempt23:05:121
11541995448,4cyclictest28366irq/58-eth022:00:133
11524995434,7cyclictest21-21ksoftirqd/121:00:121
1151999536,7cyclictest131rcu_preempt21:45:130
1153299511,3cyclictest131rcu_preempt20:30:112
1152499511,39cyclictest30227-21ssh21:10:131
11532995023,23cyclictest0-21swapper/223:15:122
1153299481,30cyclictest6788-21ssh21:15:112
11519994835,8cyclictest12-21ksoftirqd/000:35:130
11541994425,11cyclictest321rcuc/323:50:133
1152499443,30cyclictest20963-21ssh00:05:121
1151999423,30cyclictest19123-21ssh23:10:130
11524994115,19cyclictest3030-21ssh23:35:261
1153299401,29cyclictest9947-21ssh00:35:132
11524994011,17cyclictest1224-21ssh23:00:131
1152499393,5cyclictest131rcu_preempt22:55:131
1151999393,33cyclictest6798-21ssh21:15:130
11519993917,17cyclictest12-21ksoftirqd/019:20:120
11541993824,10cyclictest28366irq/58-eth020:30:103
11519993815,17cyclictest12-21ksoftirqd/023:25:120
11519993714,17cyclictest12-21ksoftirqd/000:25:130
1154199353,20cyclictest28366irq/58-eth021:55:123
1153299353,25cyclictest0-21swapper/219:10:112
1151999352,24cyclictest12-21ksoftirqd/019:30:120
1153299342,25cyclictest3326-21mailstats22:05:272
1153299342,25cyclictest3326-21mailstats22:05:262
1152499342,4cyclictest131rcu_preempt21:35:111
1151999342,23cyclictest4840-21rm21:50:130
1151999342,23cyclictest4840-21rm21:50:120
1151999342,22cyclictest2880-21ssh23:55:130
11541993320,10cyclictest0-21swapper/323:30:143
1154199331,25cyclictest28366irq/58-eth023:10:143
1152499332,24cyclictest21-21ksoftirqd/122:50:111
1152499332,23cyclictest20840-21cat19:15:281
1152499331,23cyclictest0-21swapper/122:15:111
1151999331,23cyclictest29946-21ssh22:40:110
1154199323,18cyclictest28366irq/58-eth021:50:123
1154199323,18cyclictest28366irq/58-eth021:50:113
1153299321,6cyclictest0-21swapper/222:45:132
1151999325,23cyclictest31937-21sh22:05:120
1151999325,23cyclictest31937-21sh22:05:120
1151999324,21cyclictest13877-21ssh21:55:110
1151999321,23cyclictest12-21ksoftirqd/020:10:120
1153299319,14cyclictest0-21swapper/221:55:142
1153299312,11cyclictest2158-21ssh22:24:272
1152499312,21cyclictest1327-21ssh21:30:131
11524993117,10cyclictest0-21swapper/122:20:131
1151999312,23cyclictest22759-21ssh23:30:130
11519993111,6cyclictest0-21swapper/020:30:110
11541993017,8cyclictest0-21swapper/322:05:133
11541993017,8cyclictest0-21swapper/322:05:133
1153299309,7cyclictest0-21swapper/219:45:132
1153299309,7cyclictest0-21swapper/219:45:122
1153299303,5cyclictest131rcu_preempt00:25:122
1152499301,22cyclictest1009-21ssh00:30:131
1151999302,22cyclictest28164-21ssh23:15:120
11519993014,10cyclictest12-21ksoftirqd/019:45:120
11519993014,10cyclictest12-21ksoftirqd/019:45:120
1153299292,16cyclictest4839-21diskmemload21:50:122
1153299292,16cyclictest4839-21diskmemload21:50:122
11532992912,7cyclictest0-21swapper/220:05:022
1152499292,20cyclictest20961-21ssh22:35:121
1151999292,21cyclictest19265-21ssh22:33:280
1151999292,21cyclictest19265-21ssh22:33:270
1151999291,22cyclictest8498-21ssh22:10:120
11541992813,11cyclictest0-21swapper/322:10:113
1153299284,18cyclictest22346irq/40-dwc2_hso19:20:122
1153299282,19cyclictest0-21swapper/222:40:122
1153299282,18cyclictest17291-21ssh23:45:112
1153299282,14cyclictest22346irq/40-dwc2_hso21:45:132
1152499282,18cyclictest26286-21ssh23:50:121
11519992816,3cyclictest12-21ksoftirqd/022:29:210
1151999281,19cyclictest26518-21ssh22:20:140
1153299274,16cyclictest22346irq/40-dwc2_hso22:25:142
1153299272,9cyclictest26387-21ssh23:13:272
1153299272,6cyclictest32417-21sshd20:05:122
1152499272,19cyclictest5669-21ssh00:14:271
1152499272,19cyclictest5669-21ssh00:14:271
1152499272,19cyclictest30071-21ssh23:33:261
1151999272,18cyclictest22840-21ssh22:00:130
11519992714,4cyclictest12-21ksoftirqd/021:35:310
11519992714,3cyclictest12-21ksoftirqd/023:46:450
1154199262,11cyclictest0-21swapper/321:15:123
1154199261,15cyclictest28366irq/58-eth023:45:113
1153299262,8cyclictest15607-21ssh23:43:272
1153299261,9cyclictest2654066ssh22:00:242
11532992613,10cyclictest5667-21sshd00:14:282
11532992613,10cyclictest5667-21sshd00:14:272
11532992610,13cyclictest0-21swapper/222:32:112
11532992610,13cyclictest0-21swapper/222:32:102
1151999260,11cyclictest26100-21sendmail22:20:010
1154199252,17cyclictest0-21swapper/322:20:263
1154199252,11cyclictest0-21swapper/320:05:133
11541992515,7cyclictest28366irq/58-eth022:50:163
11541992510,10cyclictest0-21swapper/323:35:263
1153299259,13cyclictest14007-21swap23:05:272
1153299253,9cyclictest27-21ksoftirqd/222:55:132
1153299252,17cyclictest22346irq/40-dwc2_hso20:10:132
1153299251,12cyclictest31789-21ssh23:35:152
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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