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2026-09-02 - 18:18

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack7slot4s.osadl.org (updated Wed Sep 02, 2026 12:45:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
29764996936,25cyclictest35966irq/58-eth010:30:133
2975699607,28cyclictest29095-21ssh11:05:112
2975699603,41cyclictest2943-21ssh12:20:132
29764995739,6cyclictest35966irq/58-eth010:50:123
2975699522,39cyclictest13400-21ssh11:50:132
2973399512,29cyclictest0-21swapper/011:05:120
2976499506,24cyclictest35966irq/58-eth009:45:133
2976499502,30cyclictest35966irq/58-eth008:05:133
2975699484,23cyclictest27-21ksoftirqd/208:30:122
29746994814,23cyclictest21-21ksoftirqd/108:20:131
2976499474,27cyclictest35966irq/58-eth010:20:133
2973399472,3cyclictest131rcu_preempt12:10:120
2976499466,24cyclictest35966irq/58-eth011:55:133
2976499441,26cyclictest35966irq/58-eth012:30:143
2976499434,24cyclictest35966irq/58-eth009:25:133
2973399435,28cyclictest14177-21ssh09:45:130
2973399432,31cyclictest26936-21ssh10:10:120
2975699421,30cyclictest25449-21ssh10:45:132
2974699422,29cyclictest20091-21ssh11:00:131
2974699422,29cyclictest20091-21ssh11:00:131
2973399428,21cyclictest12-21ksoftirqd/008:25:140
2976499413,25cyclictest35966irq/58-eth010:55:143
2976499412,26cyclictest35966irq/58-eth009:50:123
2974699411,33cyclictest9536-21ssh11:30:121
2974699401,33cyclictest13415-21ssh11:50:141
2973399405,8cyclictest131rcu_preempt10:25:140
2976499394,23cyclictest35966irq/58-eth011:10:153
2976499394,21cyclictest35966irq/58-eth010:15:143
29764993919,12cyclictest35966irq/58-eth011:40:123
2975699396,26cyclictest12726-21cat12:05:292
2974699393,32cyclictest8831-21ssh10:00:121
2975699382,20cyclictest930-21snmpd08:50:132
2975699381,25cyclictest31514-21ssh12:00:132
29756993811,20cyclictest27-21ksoftirqd/209:10:122
2973399387,19cyclictest15376-21diskmemload10:45:130
2975699379,19cyclictest27-21ksoftirqd/210:05:132
2976499361,23cyclictest35966irq/58-eth010:40:133
2974699361,26cyclictest14769-21ssh11:15:151
29733993626,5cyclictest12-21ksoftirqd/008:45:120
2973399354,26cyclictest31523-21ssh12:00:130
2973399351,25cyclictest412-21ssh11:25:130
29746993421,8cyclictest0-21swapper/110:50:151
2973399343,22cyclictest24814-21ssh09:15:120
2973399342,24cyclictest12-21ksoftirqd/011:55:120
2976499332,17cyclictest35966irq/58-eth008:35:143
2975699336,15cyclictest27346irq/40-dwc2_hso07:10:132
2975699334,19cyclictest27346irq/40-dwc2_hso09:45:132
2975699333,17cyclictest15817-1kworker/u9:211:35:122
2974699336,20cyclictest5730-21ssh11:10:131
2974699333,18cyclictest21-21ksoftirqd/112:05:131
29746993313,13cyclictest21-21ksoftirqd/107:50:131
29746993313,13cyclictest21-21ksoftirqd/107:50:131
2974699330,27cyclictest0-21swapper/108:05:131
2976499324,18cyclictest35966irq/58-eth011:25:133
2976499322,18cyclictest35966irq/58-eth007:10:123
2973399322,23cyclictest16847-21ssh12:25:310
29733993218,6cyclictest12-21ksoftirqd/007:40:130
2976499313,19cyclictest35966irq/58-eth011:30:113
2975699312,16cyclictest24796-21ssh09:15:112
2975699312,14cyclictest9543-21sh11:30:132
2974699312,22cyclictest32366-21cat11:40:301
2973399313,23cyclictest15787-21ssh09:10:140
2976499302,19cyclictest35966irq/58-eth010:00:133
2975699302,20cyclictest30744-21ssh10:30:132
2975699302,16cyclictest20095-21ssh11:00:132
2975699302,16cyclictest20095-21ssh11:00:122
29756993015,12cyclictest0-21swapper/211:45:012
2975699301,18cyclictest5257-21ssh09:40:132
2975699301,18cyclictest5257-21ssh09:40:122
2975699301,15cyclictest28676-21ssh09:35:132
2974699302,22cyclictest30551-21ssh11:59:221
29746993014,12cyclictest0-21swapper/107:30:131
2975699296,15cyclictest27346irq/40-dwc2_hso07:20:142
2975699294,16cyclictest27346irq/40-dwc2_hso08:45:122
2974699292,20cyclictest18568-21ssh11:35:131
2974699291,8cyclictest21-21ksoftirqd/110:25:121
2973399292,19cyclictest12520-21ssh10:20:040
29733992911,7cyclictest29729-21cyclictest11:40:130
2976499285,14cyclictest35966irq/58-eth009:30:143
2975699282,21cyclictest0-21swapper/212:17:292
2975699281,16cyclictest27346irq/40-dwc2_hso08:25:142
2974699285,6cyclictest21-21ksoftirqd/110:12:261
2974699282,18cyclictest31245-21ssh12:15:361
29733992811,12cyclictest12-21ksoftirqd/012:22:300
2976499273,15cyclictest0-21swapper/312:25:313
2976499272,14cyclictest35966irq/58-eth008:10:133
2975699273,19cyclictest0-21swapper/212:14:262
2975699273,16cyclictest12639-21ssh10:20:112
29746992711,8cyclictest0-21swapper/107:15:121
2973399273,11cyclictest16421-21ssh10:40:110
2973399272,19cyclictest10542-21sh09:25:150
2976499266,13cyclictest35966irq/58-eth012:10:123
2976499261,15cyclictest35966irq/58-eth012:20:133
2975699265,12cyclictest27346irq/40-dwc2_hso09:05:122
2975699263,15cyclictest27346irq/40-dwc2_hso11:10:142
2975699262,9cyclictest0-21swapper/207:50:142
2975699262,9cyclictest0-21swapper/207:50:142
2975699262,10cyclictest0-21swapper/207:15:132
29756992615,8cyclictest261rcuc/210:25:142
2975699261,20cyclictest7336-21apt-get10:35:122
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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