You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-11-07 - 20:08

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #7, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack7slot4s.osadl.org (updated Fri Nov 07, 2025 12:45:14)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3016699683,35cyclictest22498-21ssh10:20:130
3016699604,46cyclictest4694-21ssh10:30:140
3018999574,40cyclictest0-21swapper/210:20:132
3018999521,41cyclictest0-21swapper/211:55:152
30166995021,22cyclictest12-21ksoftirqd/009:15:140
3020199481,29cyclictest29566irq/58-eth009:50:123
3020199481,29cyclictest29566irq/58-eth009:50:123
30179994824,10cyclictest131rcu_preempt10:50:131
3020199464,25cyclictest29566irq/58-eth011:15:153
3017999463,34cyclictest29558-21ssh10:25:161
3016699462,28cyclictest9957-21ssh09:50:110
3016699462,28cyclictest9957-21ssh09:50:110
3020199451,15cyclictest0-21swapper/310:20:133
3018999453,34cyclictest0-21swapper/211:10:172
30179994510,8cyclictest131rcu_preempt09:25:131
30166994315,20cyclictest12-21ksoftirqd/008:05:150
3020199423,29cyclictest29566irq/58-eth009:35:153
3016699421,31cyclictest13422-21ssh11:40:130
3017999418,20cyclictest12496-21sshd10:35:161
3017999395,8cyclictest131rcu_preempt11:20:131
3017999382,30cyclictest20835-21ssh11:45:161
3017999373,8cyclictest131rcu_preempt11:25:131
3017999371,25cyclictest30900-21ssh09:20:121
3020199362,19cyclictest29566irq/58-eth010:45:123
3020199362,19cyclictest29566irq/58-eth010:30:143
3017999362,26cyclictest7916-21ssh11:15:151
3017999362,26cyclictest18206-21ssh12:05:151
3020199342,8cyclictest0-21swapper/307:50:123
3020199342,8cyclictest0-21swapper/307:50:123
3020199323,17cyclictest29566irq/58-eth011:20:143
3018999312,20cyclictest23804-21ssh09:15:142
3017999313,22cyclictest20054-21ssh10:40:141
3020199301,8cyclictest0-21swapper/311:35:153
3017999302,22cyclictest10606-21ssh10:55:151
3017999302,20cyclictest5631-21ssh11:35:151
30166993021,4cyclictest0-21swapper/012:25:140
3020199293,16cyclictest29566irq/58-eth010:25:163
3018999293,21cyclictest0-21swapper/209:34:272
3018999292,21cyclictest0-21swapper/207:40:142
3018999292,11cyclictest14151-21ntp_192.168.11410:55:262
3017999292,19cyclictest1227-21ssh12:35:141
30179992915,11cyclictest21-21ksoftirqd/112:30:161
30166992914,7cyclictest12-21ksoftirqd/012:05:130
3020199286,11cyclictest0-21swapper/312:05:133
3018999287,13cyclictest629-21Async14:00:482
3018999283,16cyclictest26346irq/40-dwc2_hso12:25:142
3016699283,21cyclictest3293-21ssh10:50:140
3020199273,16cyclictest0-21swapper/309:45:273
3020199271,3cyclictest0-21swapper/311:05:143
3020199271,3cyclictest0-21swapper/309:56:273
3020199271,2cyclictest0-21swapper/311:30:123
3020199271,2cyclictest0-21swapper/311:30:123
3020199271,2cyclictest0-21swapper/309:40:293
30201992710,13cyclictest29566irq/58-eth010:40:283
30179992715,8cyclictest21-21ksoftirqd/108:00:151
3016699271,21cyclictest0-21swapper/009:30:140
3020199262,17cyclictest29566irq/58-eth012:20:143
3020199261,4cyclictest0-21swapper/310:06:203
3020199261,3cyclictest0-21swapper/311:58:503
3020199261,3cyclictest0-21swapper/311:50:283
3020199261,3cyclictest0-21swapper/311:25:303
3020199261,3cyclictest0-21swapper/310:50:403
3020199261,3cyclictest0-21swapper/310:38:483
3020199261,3cyclictest0-21swapper/309:31:483
3020199261,3cyclictest0-21swapper/308:10:163
3020199261,3cyclictest0-21swapper/307:55:233
3018999264,14cyclictest26346irq/40-dwc2_hso07:20:132
3018999263,7cyclictest0-21swapper/211:40:132
3018999262,19cyclictest1148-21apt-get12:15:122
3018999262,16cyclictest26346irq/40-dwc2_hso07:10:152
3018999262,14cyclictest22035-21kthreadcore10:40:212
3018999261,21cyclictest29667-21cut08:50:162
3018999261,19cyclictest0-21swapper/207:25:172
3018999261,15cyclictest16409-21kthreadcore08:00:232
3017999264,15cyclictest9299-21ssh12:20:141
3017999264,14cyclictest32608-21ssh10:05:141
3017999262,18cyclictest856-21sshd10:45:171
3017999262,18cyclictest6678-21sed09:45:271
3017999262,17cyclictest16560-21ssh09:10:121
3020199256,16cyclictest29566irq/58-eth011:40:153
3020199252,3cyclictest0-21swapper/311:10:163
3020199252,3cyclictest0-21swapper/308:35:143
3020199251,5cyclictest0-21swapper/312:15:423
3020199251,5cyclictest0-21swapper/310:10:113
3020199251,3cyclictest0-21swapper/312:35:293
3020199251,3cyclictest0-21swapper/312:00:513
3020199251,3cyclictest0-21swapper/310:55:193
3020199251,3cyclictest0-21swapper/310:00:203
3020199251,3cyclictest0-21swapper/308:45:213
3020199251,2cyclictest0-21swapper/311:45:143
3018999253,19cyclictest261rcuc/211:50:222
3018999253,14cyclictest11838-21tr12:00:192
3018999252,20cyclictest9134-21latency_hist12:40:012
3018999252,20cyclictest19710-21kthreadcore09:55:212
3018999252,20cyclictest14059-21kthreadcore10:35:222
3018999252,16cyclictest17963-21kthreadcore11:20:222
3018999252,15cyclictest21476-21kthreadcore11:00:252
30189992513,5cyclictest31833-21ssh11:08:392
3018999251,20cyclictest12367-21kthreadcore09:05:202
3018999251,20cyclictest12367-21kthreadcore09:05:202
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional