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2026-03-04 - 23:04
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack7slot4s.osadl.org (updated Wed Mar 04, 2026 12:45:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2688099563,33cyclictest6636-21ssh12:25:142
26888995221,22cyclictest28366irq/58-eth010:15:143
26888994532,8cyclictest28366irq/58-eth010:40:133
2688899404,21cyclictest28366irq/58-eth009:00:113
2688899401,5cyclictest28366irq/58-eth011:05:113
2688899401,5cyclictest28366irq/58-eth011:05:113
2687099404,26cyclictest13126-21diskmemload10:00:121
2688899394,22cyclictest28366irq/58-eth009:40:133
2688899353,29cyclictest0-21swapper/309:20:133
26861993527,4cyclictest131rcu_preempt12:05:120
26888993417,7cyclictest28366irq/58-eth011:55:133
2688899334,14cyclictest28366irq/58-eth011:10:133
2688899334,13cyclictest28366irq/58-eth011:00:133
2688899331,3cyclictest0-21swapper/310:50:123
2688899331,3cyclictest0-21swapper/309:35:123
2688899331,16cyclictest28366irq/58-eth008:30:113
26880993313,14cyclictest27-21ksoftirqd/209:20:132
2686199333,23cyclictest21935-21ssh10:45:110
2686199321,3cyclictest0-21swapper/007:20:120
2688899313,15cyclictest28366irq/58-eth007:50:123
2688099318,18cyclictest32081-21kworker/u8:009:52:332
2687099312,25cyclictest6645-21sh12:25:131
2687099312,18cyclictest5386-21ssh11:30:121
2688899303,13cyclictest28366irq/58-eth010:30:123
2688899301,6cyclictest0-21swapper/311:20:123
26888993015,11cyclictest28366irq/58-eth012:25:133
2688099302,22cyclictest18302-21ssh11:18:342
26880993015,10cyclictest13126-21diskmemload10:50:122
2686199302,24cyclictest32488-21ssh11:45:110
2688899293,12cyclictest28366irq/58-eth010:10:133
26888992914,7cyclictest0-21swapper/307:40:133
2688099292,21cyclictest0-21swapper/209:05:132
2688099292,20cyclictest0-21swapper/208:00:132
2688099290,19cyclictest0-21swapper/211:30:112
2687099292,22cyclictest4397-21sh09:58:331
2687099292,21cyclictest27988-21ssh09:53:461
2687099292,20cyclictest23474-21ssh11:40:121
2686199293,22cyclictest19896-21ssh11:20:110
2688899283,18cyclictest0-21swapper/312:13:333
2688899282,18cyclictest28366irq/58-eth010:20:113
2688899281,3cyclictest0-21swapper/311:49:273
2688099283,19cyclictest0-21swapper/209:58:342
2688099283,19cyclictest0-21swapper/209:18:402
2688099282,21cyclictest26010-21ssh11:59:332
2688099281,22cyclictest8996-21ssh11:50:132
2686199284,7cyclictest131rcu_preempt07:50:130
2686199283,22cyclictest30075-21ssh12:20:110
2686199281,22cyclictest13126-21diskmemload12:30:120
2688899277,13cyclictest0-21swapper/309:17:343
2688899274,12cyclictest28366irq/58-eth011:40:123
2688899272,3cyclictest0-21swapper/312:35:123
2688899271,3cyclictest0-21swapper/309:05:183
2688899271,23cyclictest0-21swapper/309:55:113
2687099272,19cyclictest29924-21ssh09:18:401
2686199274,18cyclictest531-21usb-storage09:35:120
2686199272,22cyclictest10905-21ssh11:15:120
26861992722,2cyclictest0-21swapper/011:00:130
2688899263,16cyclictest0-21swapper/310:39:323
2688899263,15cyclictest0-21swapper/309:53:463
2688899262,4cyclictest0-21swapper/308:00:113
2688899261,7cyclictest0-21swapper/309:45:173
2688899261,4cyclictest0-21swapper/311:35:113
2688899261,4cyclictest0-21swapper/310:25:163
2688899261,3cyclictest0-21swapper/312:15:203
2688899261,3cyclictest0-21swapper/311:50:163
2688899261,3cyclictest0-21swapper/311:15:113
2688899261,3cyclictest0-21swapper/310:56:423
2688899261,3cyclictest0-21swapper/309:30:273
2688899261,3cyclictest0-21swapper/309:10:243
2688099261,8cyclictest1954266ssh10:05:302
2686199263,21cyclictest22423-21ssh09:15:130
2686199263,18cyclictest11609-21ssh09:45:140
2686199261,20cyclictest24012-21ssh10:10:150
2688899252,19cyclictest28366irq/58-eth012:20:123
2688899251,4cyclictest0-21swapper/310:48:573
2688899251,4cyclictest0-21swapper/309:25:233
2688899251,4cyclictest0-21swapper/307:45:263
2688899251,3cyclictest0-21swapper/312:31:523
2688899251,3cyclictest0-21swapper/312:05:123
2688899251,3cyclictest0-21swapper/312:01:353
2688899251,3cyclictest0-21swapper/311:32:173
2688899251,3cyclictest0-21swapper/310:09:023
2688899251,3cyclictest0-21swapper/308:50:143
2688899251,3cyclictest0-21swapper/308:40:173
2688899251,3cyclictest0-21swapper/307:20:273
2688099253,18cyclictest22346irq/40-dwc2_hso09:30:102
2688099251,8cyclictest964466ssh10:20:142
2688099251,16cyclictest18455-21apt-get10:25:122
2688099251,14cyclictest11497-21ls09:25:222
2687099252,8cyclictest0-21swapper/111:59:181
2686199254,6cyclictest131rcu_preempt10:50:140
26861992520,2cyclictest12-21ksoftirqd/011:40:130
2688899248,10cyclictest0-21swapper/310:00:143
2688899247,10cyclictest28366irq/58-eth011:25:123
2688899241,5cyclictest0-21swapper/308:20:213
2688899241,5cyclictest0-21swapper/308:20:203
2688899241,3cyclictest0-21swapper/308:35:133
2688899241,3cyclictest0-21swapper/307:55:173
2688899241,3cyclictest0-21swapper/307:30:183
2688099241,8cyclictest11727-21grep09:45:162
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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