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2026-05-13 - 07:15

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack7slot4s.osadl.org (updated Wed May 13, 2026 00:45:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
549399524,26cyclictest27-21ksoftirqd/221:15:142
547199513,37cyclictest5856-21ssh00:35:140
547199511,42cyclictest1329-21ssh22:45:140
5505994725,12cyclictest35966irq/58-eth023:40:123
548199453,29cyclictest20883-21ssh22:20:131
548199401,6cyclictest21-21ksoftirqd/121:05:111
549399388,22cyclictest27-21ksoftirqd/222:35:132
548199382,9cyclictest21-21ksoftirqd/123:30:131
547199370,6cyclictest131rcu_preempt19:25:130
549399361,17cyclictest20162-21ssh22:19:382
5481993611,4cyclictest0-21swapper/119:40:101
547199362,7cyclictest12-21ksoftirqd/023:55:120
548199352,8cyclictest131rcu_preempt23:20:131
550599341,23cyclictest35966irq/58-eth022:35:133
550599341,17cyclictest35966irq/58-eth022:45:133
549399342,16cyclictest17767-21ssh22:53:392
548199344,26cyclictest31566-21ssh21:50:131
547199340,27cyclictest26245-21ssh22:05:120
549399330,18cyclictest29145-21ssh00:30:152
547199338,4cyclictest131rcu_preempt23:35:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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