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2026-02-04 - 10:36
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack7slot4s.osadl.org (updated Wed Feb 04, 2026 00:45:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
6732996540,19cyclictest0-21swapper/222:00:122
6711995031,10cyclictest0-21swapper/022:25:130
6711995031,10cyclictest0-21swapper/022:25:130
671199483,36cyclictest547-21ssh21:50:130
671199441,31cyclictest25099-21ssh21:10:140
672499401,36cyclictest28011-21ssh23:35:131
673299392,19cyclictest3836-21ssh23:39:362
671199397,5cyclictest131rcu_preempt00:20:150
671199393,24cyclictest8002-21ssh22:30:130
6741993823,10cyclictest28366irq/58-eth021:25:113
673299381,15cyclictest15307-21ssh23:10:142
6724993832,3cyclictest18969-21ssh23:30:121
672499382,30cyclictest25998-21ssh22:40:111
6724993813,21cyclictest131rcu_preempt22:05:151
6711993828,6cyclictest121ksoftirqd/019:40:100
673299372,18cyclictest32143-21ssh00:11:482
6724993720,12cyclictest21-21ksoftirqd/121:35:131
672499371,32cyclictest22684-21ssh23:50:151
671199374,24cyclictest26022-21ssh22:40:120
6724993610,9cyclictest131rcu_preempt21:45:121
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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