You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-18 - 21:58

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #7, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack7slot4s.osadl.org (updated Wed Mar 18, 2026 12:45:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31341996334,21cyclictest28366irq/58-eth012:00:113
31341996334,21cyclictest28366irq/58-eth012:00:113
3133399602,46cyclictest27812-21ssh11:40:122
3133399553,32cyclictest20617-21ssh11:00:112
3131099553,47cyclictest3026-21ssh09:20:130
3133399495,19cyclictest29985-21ssh09:35:142
3133399484,36cyclictest2682-21ssh10:50:152
31333994833,6cyclictest27-21ksoftirqd/212:05:122
3131999471,3cyclictest131rcu_preempt12:25:111
3131099452,33cyclictest4460-21ssh11:45:130
3134199443,21cyclictest28366irq/58-eth008:10:133
31333994430,8cyclictest27-21ksoftirqd/211:25:112
31333994414,21cyclictest27-21ksoftirqd/210:05:122
3134199423,26cyclictest28366irq/58-eth011:20:123
3131999427,6cyclictest131rcu_preempt11:45:131
3131099391,26cyclictest7940-21ssh12:05:110
3134199373,16cyclictest28366irq/58-eth012:30:123
3134199362,4cyclictest0-21swapper/311:40:113
3133399361,29cyclictest924-21snmpd08:30:132
31310993610,6cyclictest131rcu_preempt07:20:110
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional