You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-26 - 14:04

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #7, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack7slot4s.osadl.org (updated Sun Jul 26, 2026 00:45:16)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2483499632,39cyclictest16657-21ssh23:55:142
24842996129,20cyclictest35966irq/58-eth023:50:133
24821995913,12cyclictest131rcu_preempt19:50:131
24842995840,11cyclictest35966irq/58-eth023:25:123
2483499572,31cyclictest455-21ssh23:10:132
2482199552,40cyclictest10782-21ssh21:10:131
24834995025,18cyclictest27-21ksoftirqd/223:44:262
2483499501,36cyclictest28790-21ssh21:20:152
24834994919,14cyclictest630-21Async09:36:312
2483499472,28cyclictest29362-21ssh22:50:132
24834994612,23cyclictest27-21ksoftirqd/223:35:132
24821994623,20cyclictest21-21ksoftirqd/120:35:141
2481199451,31cyclictest13112-21ssh23:35:140
2481199433,16cyclictest20386-21ssh00:15:160
2484299415,22cyclictest35966irq/58-eth022:15:143
2484299415,22cyclictest35966irq/58-eth022:15:133
2482199412,26cyclictest18119-21ssh21:50:131
2482199401,3cyclictest131rcu_preempt21:55:131
2481199402,31cyclictest2335-21ssh00:05:170
2481199401,4cyclictest131rcu_preempt00:20:120
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional