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2026-02-06 - 07:20
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #7

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack7slot7s.osadl.org (updated Thu Feb 05, 2026 00:43:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2119829171,16sleep20-21swapper/219:06:552
2119829171,16sleep20-21swapper/219:06:552
2129128860,9sleep30-21swapper/319:08:103
2129128860,9sleep30-21swapper/319:08:093
2136528774,9sleep00-21swapper/019:09:070
2136528774,9sleep00-21swapper/019:09:060
2133127958,6sleep10-21swapper/119:08:401
2133127958,6sleep10-21swapper/119:08:391
66112680,1sleep36610-21ssh22:40:253
21521992925,4cyclictest0-21swapper/200:11:432
2152199290,28cyclictest0-21swapper/223:12:112
2152199290,26cyclictest0-21swapper/221:46:072
2152199280,28cyclictest0-21swapper/200:38:472
2152199270,27cyclictest0-21swapper/222:46:092
2152199270,27cyclictest0-21swapper/222:46:082
2152199240,24cyclictest0-21swapper/221:33:082
2151799242,19cyclictest14132-21diskmemload00:00:491
2151799240,22cyclictest0-21swapper/100:16:501
2152199230,23cyclictest0-21swapper/222:14:432
2151299232,3cyclictest141rcu_preempt23:40:470
2151299230,2cyclictest0-21swapper/021:32:300
2151299230,22cyclictest0-21swapper/023:30:430
2151299230,1cyclictest0-21swapper/023:21:000
161772230,0sleep20-21swapper/200:22:072
161772230,0sleep20-21swapper/200:22:062
2152199220,21cyclictest0-21swapper/223:24:462
2152199220,20cyclictest0-21swapper/223:04:252
2151799220,1cyclictest0-21swapper/123:27:521
21512992220,2cyclictest13-21ksoftirqd/023:00:200
21512992213,3cyclictest13-21ksoftirqd/022:00:310
2152199211,15cyclictest0-21swapper/222:50:062
2152199210,21cyclictest0-21swapper/221:43:062
2152199210,20cyclictest0-21swapper/222:39:032
21517992121,0cyclictest0-21swapper/123:10:161
21512992121,0cyclictest0-21swapper/021:40:590
21512992114,1cyclictest13-21ksoftirqd/023:14:010
21521992018,1cyclictest27242-21grep19:20:172
2152199200,19cyclictest0-21swapper/223:38:362
21517992012,7cyclictest38150irq/131-snd_hda22:17:361
202052200,2sleep020199-21ntp_states22:10:210
2152599192,13cyclictest0-21swapper/322:52:563
21525991918,1cyclictest0-21swapper/322:32:513
2152599190,18cyclictest0-21swapper/300:18:143
2152199190,19cyclictest0-21swapper/222:06:492
21517991918,1cyclictest31274-21apache200:27:251
2151299194,2cyclictest141rcu_preempt21:56:530
2151299192,3cyclictest141rcu_preempt22:09:030
21512991918,1cyclictest0-21swapper/021:19:140
2151299190,4cyclictest0-21swapper/023:57:200
2151299190,0cyclictest0-21swapper/023:54:300
21521991817,1cyclictest14132-21diskmemload23:32:252
2152199180,2cyclictest0-21swapper/221:21:482
2152199180,18cyclictest0-21swapper/223:50:102
2152199180,17cyclictest0-21swapper/200:04:452
2152199180,11cyclictest0-21swapper/223:17:402
21517991814,4cyclictest0-21swapper/122:04:041
2151799181,1cyclictest18140-21ssh22:28:491
2151799180,1cyclictest0-21swapper/123:05:401
21512991817,1cyclictest161rcuc/000:13:170
21512991816,2cyclictest13-21ksoftirqd/022:39:450
2151299180,1cyclictest0-21swapper/023:45:490
2152599173,4cyclictest141rcu_preempt23:25:103
2152599170,1cyclictest0-21swapper/323:16:243
2152199170,17cyclictest0-21swapper/222:28:352
2152199170,17cyclictest0-21swapper/200:08:472
2151799170,17cyclictest0-21swapper/100:38:351
2151299179,3cyclictest141rcu_preempt00:09:490
2151299178,6cyclictest141rcu_preempt22:40:490
21512991713,4cyclictest161rcuc/000:36:140
21512991712,3cyclictest13-21ksoftirqd/000:18:020
21512991710,5cyclictest13-21ksoftirqd/023:06:010
2151299170,1cyclictest0-21swapper/000:24:090
2151299170,1cyclictest0-21swapper/000:24:080
2151299170,1cyclictest0-21swapper/000:01:490
2151299170,0cyclictest0-21swapper/022:34:400
2152599168,7cyclictest8026-21tr23:20:143
2152199161,1cyclictest0-21swapper/221:53:142
2152199160,15cyclictest28962-21apache_accesses19:25:112
21517991616,0cyclictest0-21swapper/122:56:181
2151799160,10cyclictest0-21swapper/122:05:151
2151799160,10cyclictest0-21swapper/121:43:041
2151299167,8cyclictest13-21ksoftirqd/020:10:190
2151299165,3cyclictest13-21ksoftirqd/021:28:150
2151299163,3cyclictest141rcu_preempt21:51:470
2151299160,16cyclictest0-21swapper/021:48:020
2152599152,8cyclictest0-21swapper/300:37:473
21525991510,5cyclictest17984-21sh22:28:433
2152199155,4cyclictest225-21systemd-journal22:21:252
21521991513,2cyclictest0-21swapper/223:41:072
21521991511,3cyclictest1099-21wc20:40:182
2152199150,15cyclictest0-21swapper/222:03:122
2152199150,14cyclictest0-21swapper/200:32:482
21517991513,1cyclictest14132-21diskmemload21:10:411
21517991512,2cyclictest0-21swapper/123:17:101
2151799150,2cyclictest0-21swapper/122:33:261
2151799150,15cyclictest0-21swapper/123:58:441
2151299159,2cyclictest23913-21cron19:15:010
2151299153,12cyclictest0-21swapper/022:56:200
2151299150,4cyclictest0-21swapper/022:45:000
2151299150,4cyclictest0-21swapper/022:45:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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