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2025-09-19 - 03:08

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #7

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack7slot7s.osadl.org (updated Fri Sep 19, 2025 00:43:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12460210779,8sleep30-21swapper/319:06:473
12637210086,9sleep10-21swapper/119:09:011
1237527967,8sleep00-21swapper/019:05:390
1259627457,13sleep20-21swapper/219:08:302
12813993029,1cyclictest0-21swapper/300:16:573
1280799240,20cyclictest0-21swapper/122:02:281
1281099230,22cyclictest0-21swapper/200:36:472
1281099220,19cyclictest0-21swapper/222:41:522
1280599227,7cyclictest2112-21munin-run21:05:000
12813992119,1cyclictest7754-21fschecks_count00:30:183
12813992119,1cyclictest7754-21fschecks_count00:30:173
1281399210,20cyclictest0-21swapper/323:23:203
12805992019,1cyclictest0-21swapper/022:23:380
1280599190,2cyclictest141rcu_preempt23:55:470
1280599190,2cyclictest0-21swapper/000:31:270
1280599190,2cyclictest0-21swapper/000:31:270
1281399180,18cyclictest0-21swapper/321:31:083
1281099180,12cyclictest0-21swapper/221:20:152
1280599186,6cyclictest20148-21munin-run19:25:000
12813991716,1cyclictest0-21swapper/322:10:293
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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