You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-18 - 04:00

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #7, slot #7

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack7slot7s.osadl.org (updated Tue Aug 18, 2026 00:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1184129443,47sleep10-21swapper/119:06:461
1204629279,9sleep00-21swapper/019:09:260
1183328846,38sleep30-21swapper/319:06:403
1195628644,38sleep20-21swapper/219:08:162
191762670,0sleep00-21swapper/022:54:370
12181993616,19cyclictest0-21swapper/223:15:112
12181993014,15cyclictest0-21swapper/220:45:132
12181992723,4cyclictest0-21swapper/222:22:332
1218299240,3cyclictest0-21swapper/322:59:183
1218299236,2cyclictest0-21swapper/323:41:543
12182992221,1cyclictest0-21swapper/321:56:503
12181992218,4cyclictest0-21swapper/222:33:532
1217999220,18cyclictest0-21swapper/023:53:390
12182992016,3cyclictest5906-21aten2_r7power_c23:25:153
12181992015,4cyclictest26906-21sensors00:15:232
1218199200,19cyclictest0-21swapper/223:10:132
12181991915,4cyclictest0-21swapper/221:49:332
12181991914,4cyclictest0-21swapper/222:03:032
1218199190,2cyclictest0-21swapper/222:48:092
12180991919,0cyclictest0-21swapper/121:14:391
12180991919,0cyclictest0-21swapper/100:30:081
1217999192,13cyclictest1142-21runrttasks21:34:380
72762180,0sleep00-21swapper/000:04:290
1218299186,12cyclictest0-21swapper/300:32:213
1218199185,13cyclictest0-21swapper/219:17:092
12181991816,2cyclictest0-21swapper/221:53:132
12181991814,4cyclictest0-21swapper/200:11:232
12181991814,1cyclictest0-21swapper/223:20:332
12181991813,4cyclictest12064-21ssh00:06:432
1218199181,17cyclictest55650irq/127-enp2s0-22:10:242
1218199180,1cyclictest0-21swapper/200:25:242
12180991816,1cyclictest0-21swapper/123:20:161
1218099181,15cyclictest5225-21diskmemload23:48:241
1218099180,18cyclictest0-21swapper/121:25:531
1217999183,14cyclictest0-21swapper/022:34:220
1218199174,13cyclictest0-21swapper/219:43:192
1218199170,17cyclictest0-21swapper/222:51:102
1218199170,17cyclictest0-21swapper/222:35:012
1218199170,14cyclictest0-21swapper/222:17:302
1218199170,14cyclictest0-21swapper/222:17:302
1218099175,1cyclictest0-21swapper/100:37:061
1218099170,1cyclictest0-21swapper/122:36:181
1218099170,11cyclictest0-21swapper/120:50:151
1218099170,0cyclictest0-21swapper/123:38:441
1217999171,13cyclictest14498-21/usr/sbin/munin21:15:150
12182991615,1cyclictest0-21swapper/300:01:003
1218299160,16cyclictest0-21swapper/321:27:383
12181991613,3cyclictest0-21swapper/200:23:032
12181991612,4cyclictest0-21swapper/221:36:542
1218199160,4cyclictest141rcu_preempt23:06:242
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional