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2026-07-05 - 13:28

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #7

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack7slot7s.osadl.org (updated Sun Jul 05, 2026 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1425329279,9sleep00-21swapper/019:07:000
1421729065,9sleep30-21swapper/319:06:363
1423728764,13sleep10-21swapper/119:06:491
1235628270,8sleep20-21swapper/219:05:092
64682570,1sleep3381rcuc/300:20:143
1457499285,1cyclictest0-21swapper/200:38:252
14574992725,2cyclictest0-21swapper/223:55:132
1457099260,26cyclictest0-21swapper/122:38:471
14574992522,3cyclictest0-21swapper/200:30:342
14576992422,1cyclictest0-21swapper/323:32:473
14574992424,0cyclictest0-21swapper/222:38:232
1457099240,2cyclictest0-21swapper/121:15:121
1457699231,1cyclictest0-21swapper/321:43:033
1457099231,1cyclictest0-21swapper/120:10:181
1456899230,0cyclictest0-21swapper/021:33:340
14574992217,5cyclictest0-21swapper/222:00:332
1457499220,21cyclictest7101-21diskmemload22:15:232
1457099220,22cyclictest0-21swapper/121:13:081
14574992120,1cyclictest0-21swapper/220:20:132
14576992019,1cyclictest0-21swapper/323:14:093
1457699200,19cyclictest0-21swapper/322:09:403
1457499201,2cyclictest1162-21munin-run19:50:002
1457499200,1cyclictest55550irq/126-enp2s0-21:53:022
14570992017,2cyclictest0-21swapper/122:30:011
1457099200,19cyclictest0-21swapper/123:25:401
1456899200,2cyclictest0-21swapper/021:27:330
14576991917,1cyclictest0-21swapper/323:53:433
1457699190,17cyclictest0-21swapper/323:04:103
14574991917,2cyclictest0-21swapper/223:49:022
14574991915,4cyclictest0-21swapper/222:11:032
1457499190,17cyclictest0-21swapper/223:29:122
1457099192,1cyclictest141rcu_preempt20:40:131
1457099190,1cyclictest0-21swapper/122:09:391
1457099190,1cyclictest0-21swapper/100:31:201
1457099190,18cyclictest0-21swapper/122:00:461
1457099190,16cyclictest0-21swapper/123:53:431
1456899195,7cyclictest3316-21perf22:05:010
1456899190,19cyclictest0-21swapper/000:32:420
1456899190,0cyclictest0-21swapper/000:17:570
14574991815,3cyclictest0-21swapper/221:14:522
14574991815,3cyclictest0-21swapper/200:08:232
1457499180,1cyclictest0-21swapper/221:36:442
1457099185,2cyclictest0-21swapper/122:44:531
14570991812,4cyclictest38150irq/131-snd_hda22:58:441
1457099181,13cyclictest0-21swapper/123:20:121
1457099180,5cyclictest5870-21ssh00:00:271
1457099180,18cyclictest0-21swapper/123:09:371
1457099180,0cyclictest0-21swapper/123:32:471
14568991815,2cyclictest13-21ksoftirqd/023:45:520
1456899180,2cyclictest0-21swapper/022:14:400
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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