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2026-08-25 - 10:14

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #7

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack7slot7s.osadl.org (updated Tue Aug 25, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
83421310,0sleep30-21swapper/300:05:253
921629481,9sleep20-21swapper/219:06:192
934429279,9sleep00-21swapper/019:07:580
927528769,13sleep10-21swapper/119:07:081
932228067,9sleep30-21swapper/319:07:413
260082500,1sleep30-21swapper/323:00:413
9589992824,2cyclictest23157-21df_abs00:20:111
958999250,25cyclictest0-21swapper/123:28:151
9587992222,0cyclictest0-21swapper/000:26:500
959299210,21cyclictest0-21swapper/221:50:242
9587992119,0cyclictest0-21swapper/022:21:070
958799200,20cyclictest0-21swapper/021:38:570
958799200,20cyclictest0-21swapper/021:38:570
9592991918,1cyclictest0-21swapper/222:59:342
959299190,19cyclictest0-21swapper/222:01:532
958999197,10cyclictest38150irq/131-snd_hda00:09:501
9589991917,1cyclictest4901-21sed20:05:201
9587991919,0cyclictest0-21swapper/021:28:100
959299182,2cyclictest141rcu_preempt22:35:342
959299180,1cyclictest55750irq/128-enp2s0-21:23:032
958999180,1cyclictest0-21swapper/121:44:181
958799180,1cyclictest0-21swapper/021:43:060
958799180,17cyclictest0-21swapper/021:10:130
35702180,2sleep232-21ksoftirqd/221:30:002
9596991715,1cyclictest39-21ksoftirqd/323:10:213
9596991715,1cyclictest39-21ksoftirqd/300:30:313
9592991716,1cyclictest0-21swapper/223:05:232
959299170,17cyclictest25841-21ssh23:00:332
959299170,0cyclictest0-21swapper/222:48:432
958799176,6cyclictest32316-21perf23:25:000
958799176,6cyclictest32316-21perf23:25:000
9592991615,1cyclictest0-21swapper/222:25:132
9592991614,1cyclictest0-21swapper/222:23:432
9592991614,1cyclictest0-21swapper/220:30:142
959299160,1cyclictest0-21swapper/200:06:472
9589991613,3cyclictest0-21swapper/123:40:221
958999160,15cyclictest0-21swapper/123:15:181
958999160,0cyclictest0-21swapper/123:09:201
958799164,6cyclictest23836-21munin-run19:40:000
958799164,6cyclictest23836-21munin-run19:40:000
958799160,9cyclictest0-21swapper/021:53:560
9592991514,1cyclictest0-21swapper/222:30:042
9592991514,1cyclictest0-21swapper/222:06:532
959299150,15cyclictest0-21swapper/223:36:422
9589991513,2cyclictest0-21swapper/122:00:001
9589991512,2cyclictest0-21swapper/120:15:161
958999150,1cyclictest0-21swapper/121:11:281
958999150,14cyclictest0-21swapper/100:26:161
958999150,13cyclictest26618-21cat19:45:001
958799153,6cyclictest0-21swapper/023:25:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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