You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-11 - 09:58

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #7, slot #7

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack7slot7s.osadl.org (updated Fri Sep 11, 2026 00:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
265629773,8sleep00-21swapper/019:07:590
257029369,8sleep20-21swapper/219:06:522
261828067,9sleep30-21swapper/319:07:293
263727868,6sleep10-21swapper/119:07:441
166472290,1chrt16648-21ssh22:00:212
290699270,27cyclictest0-21swapper/200:23:512
2906992624,1cyclictest0-21swapper/223:40:112
290699260,26cyclictest0-21swapper/222:30:232
290699260,26cyclictest0-21swapper/221:14:502
290699260,24cyclictest0-21swapper/223:59:112
291099250,2cyclictest0-21swapper/321:43:243
2906992422,1cyclictest0-21swapper/221:25:202
290699240,24cyclictest0-21swapper/223:10:552
291099230,22cyclictest0-21swapper/322:54:113
291099230,21cyclictest0-21swapper/322:45:033
290499235,10cyclictest0-21swapper/121:00:111
290699227,13cyclictest0-21swapper/223:53:262
2906992218,3cyclictest27934-21diskmemload00:15:142
290499222,19cyclictest0-21swapper/122:25:131
2906992118,3cyclictest27934-21diskmemload21:53:162
2906992115,6cyclictest0-21swapper/222:25:012
290699210,20cyclictest0-21swapper/219:35:132
290699207,11cyclictest0-21swapper/200:34:292
2906992018,1cyclictest1872-21sh23:09:352
2906992016,1cyclictest55650irq/127-enp2s0-21:15:152
290499200,19cyclictest0-21swapper/121:10:121
290099200,20cyclictest15306-21ssh00:15:120
305032190,0sleep00-21swapper/022:47:280
2910991919,0cyclictest0-21swapper/322:13:133
2910991919,0cyclictest0-21swapper/321:54:103
290699198,3cyclictest55850irq/129-enp2s0-23:17:362
290699192,17cyclictest0-21swapper/222:51:582
290699190,18cyclictest0-21swapper/221:34:332
291099183,6cyclictest0-21swapper/320:10:133
2910991817,1cyclictest0-21swapper/323:06:323
290699187,10cyclictest0-21swapper/200:35:222
290699186,9cyclictest0-21swapper/200:01:402
290699184,14cyclictest0-21swapper/221:44:102
2906991817,1cyclictest0-21swapper/200:11:542
2906991817,1cyclictest0-21swapper/200:11:542
2906991817,0cyclictest27934-21diskmemload23:23:322
2906991816,1cyclictest27934-21diskmemload23:30:162
2906991816,1cyclictest27934-21diskmemload22:20:112
2906991815,2cyclictest27934-21diskmemload22:05:402
2906991813,1cyclictest0-21swapper/200:05:162
2906991810,5cyclictest0-21swapper/222:47:542
2904991813,4cyclictest0-21swapper/123:40:161
290499180,1cyclictest0-21swapper/122:20:211
291099171,3cyclictest0-21swapper/322:37:213
291099171,3cyclictest0-21swapper/322:37:213
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional