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2026-01-18 - 11:04
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #7

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack7slot7s.osadl.org (updated Sun Jan 18, 2026 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1515229380,9sleep00-21swapper/019:06:000
1518028976,9sleep20-21swapper/219:06:222
1542228265,13sleep10-21swapper/119:09:311
1541928168,9sleep30-21swapper/319:09:303
14122490,0sleep30-21swapper/321:25:243
15542992925,3cyclictest0-21swapper/122:51:431
15551992626,0cyclictest0-21swapper/323:35:593
1554699250,25cyclictest0-21swapper/222:02:162
1554699250,25cyclictest0-21swapper/221:52:122
1554699250,24cyclictest0-21swapper/221:45:442
1554699250,24cyclictest0-21swapper/221:45:432
15542992522,2cyclictest0-21swapper/121:20:031
1554699240,23cyclictest0-21swapper/200:35:002
15542992422,1cyclictest25-21ksoftirqd/122:39:531
1555199232,3cyclictest0-21swapper/323:33:593
1554699230,23cyclictest0-21swapper/221:43:162
1554299238,2cyclictest141rcu_preempt22:55:131
1555199221,3cyclictest0-21swapper/321:21:333
1554699220,21cyclictest0-21swapper/223:40:502
1554699220,0cyclictest0-21swapper/223:14:282
1554299221,18cyclictest25-21ksoftirqd/122:20:231
1555199212,13cyclictest0-21swapper/323:02:033
1554699210,21cyclictest0-21swapper/221:18:042
15542992120,1cyclictest0-21swapper/122:27:591
15542992118,2cyclictest27080-21/usr/sbin/munin00:15:101
15542992118,2cyclictest25-21ksoftirqd/123:20:171
1554699200,20cyclictest0-21swapper/223:58:162
1554699200,20cyclictest0-21swapper/221:10:212
1553899200,16cyclictest0-21swapper/023:36:550
1555199190,1cyclictest0-21swapper/321:17:433
1555199190,1cyclictest0-21swapper/300:23:523
1554699190,1cyclictest0-21swapper/223:51:232
1554699190,1cyclictest0-21swapper/222:46:572
1554299199,2cyclictest141rcu_preempt21:38:501
15542991918,1cyclictest25-21ksoftirqd/121:45:001
15542991914,4cyclictest0-21swapper/123:55:051
15542991914,1cyclictest25-21ksoftirqd/122:42:371
1554299191,1cyclictest0-21swapper/121:34:301
256782180,1sleep025681-21acpi23:55:120
1555199183,9cyclictest0-21swapper/322:20:133
1554699180,18cyclictest0-21swapper/222:58:332
1554699180,18cyclictest0-21swapper/222:34:402
1554699180,0cyclictest0-21swapper/222:35:152
15542991817,1cyclictest25-21ksoftirqd/121:50:181
1553899185,7cyclictest22608-21munin-run23:14:590
15538991816,2cyclictest17650-21apache222:36:450
1555199172,2cyclictest0-21swapper/300:08:063
15551991717,0cyclictest0-21swapper/323:09:083
1555199170,5cyclictest0-21swapper/300:32:413
1554699170,9cyclictest0-21swapper/221:27:402
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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