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2026-06-26 - 00:34

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #7, slot #7

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack7slot7s.osadl.org (updated Thu Jun 25, 2026 12:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1295929380,9sleep00-21swapper/007:05:380
1298728963,9sleep30-21swapper/307:06:003
1314528667,8sleep20-21swapper/207:08:042
1296028566,15sleep10-21swapper/107:05:381
1337699270,27cyclictest0-21swapper/212:33:582
1337699270,25cyclictest0-21swapper/211:56:342
1337699260,0cyclictest0-21swapper/207:30:132
1337699230,23cyclictest0-21swapper/211:33:312
1337699230,22cyclictest0-21swapper/211:42:522
1337699220,22cyclictest0-21swapper/209:16:482
13370992216,1cyclictest25-21ksoftirqd/110:34:411
13382992120,1cyclictest0-21swapper/312:30:063
1337699210,20cyclictest0-21swapper/210:27:312
13370992116,1cyclictest25-21ksoftirqd/112:37:591
1336999210,1cyclictest0-21swapper/011:35:280
242862200,2sleep024284-21ssh09:20:160
1337699201,1cyclictest141rcu_preempt09:23:532
1337699200,20cyclictest0-21swapper/210:53:132
1337699200,15cyclictest0-21swapper/212:05:412
13370992017,2cyclictest25-21ksoftirqd/110:55:191
13370992016,4cyclictest38150irq/131-snd_hda10:42:311
1337699190,19cyclictest0-21swapper/211:01:042
1337699190,18cyclictest0-21swapper/210:40:502
1337699190,18cyclictest0-21swapper/210:30:312
1337099192,1cyclictest141rcu_preempt10:16:421
1336999190,2cyclictest0-21swapper/010:03:410
1337699181,0cyclictest141rcu_preempt12:35:332
1337699180,2cyclictest855-21kworker/u8:111:22:012
1337699180,17cyclictest0-21swapper/209:51:002
13370991815,2cyclictest25-21ksoftirqd/109:50:181
13370991813,4cyclictest0-21swapper/112:25:251
1337099180,17cyclictest0-21swapper/109:26:161
1336999180,18cyclictest0-21swapper/010:28:570
211662170,0chrt0-21swapper/111:14:541
1338299174,1cyclictest141rcu_preempt11:02:303
1338299171,4cyclictest8306-21kworker/u8:110:38:053
1338299171,4cyclictest8306-21kworker/u8:110:38:043
1338299171,1cyclictest0-21swapper/308:55:133
13376991717,0cyclictest0-21swapper/210:04:542
13376991713,1cyclictest32-21ksoftirqd/210:07:332
1337699170,2cyclictest0-21swapper/210:46:202
13370991714,2cyclictest25-21ksoftirqd/112:05:261
13370991714,1cyclictest25-21ksoftirqd/111:38:341
1337099171,1cyclictest6128-21diskmemload09:57:451
1337099170,17cyclictest0-21swapper/111:05:491
1337099170,17cyclictest0-21swapper/110:09:091
1336999170,1cyclictest0-21swapper/012:23:560
1336999170,1cyclictest0-21swapper/012:23:560
1336999170,1cyclictest0-21swapper/010:54:150
1337699162,1cyclictest141rcu_preempt11:26:292
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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