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2026-03-01 - 04:18
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack7slot8.osadl.org (updated Sun Mar 01, 2026 01:44:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
16227212220,9sleep015656-21apt-get19:05:390
168189912433,35cyclictest8920-21apt-get23:12:070
168189911929,51cyclictest23467-21if_eth000:05:310
168189911730,33cyclictest1382-21diskstats22:40:230
168189911643,22cyclictest204592chrt19:26:150
168189911043,51cyclictest3650irq/20-4900000022:15:420
168189910957,35cyclictest26873-21mailstats20:00:470
168189910945,30cyclictest24782-21cron19:50:000
168189910941,50cyclictest3650irq/20-4900000023:35:230
168189910840,50cyclictest9018-21latency_hist23:10:080
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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