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2026-01-19 - 01:26
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack7slot8.osadl.org (updated Sun Jan 18, 2026 13:44:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31438216790,11sleep031427-21munin-run07:10:010
31488991667,101cyclictest16334-21apt-get08:18:170
31488991608,108cyclictest14203-21apt-get10:17:050
31488991589,107cyclictest1-21systemd11:30:420
31488991586,129cyclictest17278-21/usr/sbin/munin10:30:130
31488991555,89cyclictest24530-21apt-get11:02:120
314889915522,113cyclictest754-21systemd-journal11:40:020
31488991548,107cyclictest5055-21/usr/sbin/munin07:30:450
31488991536,97cyclictest12664-21hostname12:20:140
31488991535,107cyclictest730-21/usr/sbin/munin07:15:120
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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