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2026-01-24 - 12:13
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack7slot8.osadl.org (updated Sat Jan 24, 2026 01:44:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30273229031,76sleep030068-21/usr/sbin/munin19:05:180
6530211016,12sleep0101ktimersoftd/019:40:150
825021045,17sleep08259-21users19:45:480
1013421035,13sleep010137-21df00:05:150
206472985,13sleep020648-21sshd20:34:100
3125699969,16cyclictest7634-21diskstats23:55:260
31256999654,26cyclictest101ktimersoftd/021:02:120
160072965,12sleep016067-21df20:15:160
31256999548,34cyclictest101ktimersoftd/023:40:370
129092956,11sleep012904-21munin-run20:05:030
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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