You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-20 - 20:27
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack7slot8.osadl.org (updated Tue Jan 20, 2026 13:44:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
14931221130,52sleep00-21swapper/007:05:030
16182991677,118cyclictest1305-21snmpd08:30:080
161829916310,131cyclictest805-21rs:main0
161829916224,116cyclictest1408-21nginx08:15:060
16182991618,113cyclictest1305-21snmpd09:25:290
161829916148,93cyclictest8950irq/40-mmc110:40:330
161829916037,87cyclictest10250irq/56-4a10000008:50:140
16182991589,104cyclictest4064-21apt-get08:32:110
16182991579,108cyclictest16667-21ntp_states07:10:420
16182991578,96cyclictest8542-21apt-get10:55:360
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional