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2026-03-02 - 05:01
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack7slot8.osadl.org (updated Mon Mar 02, 2026 01:44:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3756220026,49sleep00-21swapper/019:06:470
42109915980,37cyclictest754-21systemd-journal19:55:290
42109915382,50cyclictest26635-21chrt20:35:390
42109915081,49cyclictest1305-21snmpd21:28:360
42109914881,48cyclictest27803-21/usr/sbin/munin20:40:310
42109914770,59cyclictest17013-21apt-get20:02:080
42109914766,22cyclictest14143-21apt-get19:52:080
42109914469,37cyclictest1305-21snmpd22:45:280
42109914282,39cyclictest6223-21ntpq23:30:410
42109914279,43cyclictest8316-21chrt23:40:060
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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