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2026-02-25 - 13:22
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack7slot8.osadl.org (updated Wed Feb 25, 2026 01:44:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
29553214528,78sleep01305-21snmpd19:09:020
297359910443,42cyclictest0-21swapper/019:33:460
297359910423,62cyclictest32194-21apt-get19:20:470
297359910214,68cyclictest0-21swapper/021:54:170
297359910051,31cyclictest3650irq/20-4900000023:32:100
2973599993,41cyclictest7946-21apt-get00:07:110
29735999837,44cyclictest0-21swapper/019:11:520
29735999720,38cyclictest1305-21snmpd00:17:070
2973599969,35cyclictest15461-21diskstats20:20:240
29735999540,37cyclictest4500-21gpgv21:45:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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