You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-19 - 04:26
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack7slot8.osadl.org (updated Thu Feb 19, 2026 01:44:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1444226427,191sleep01208-21/usr/sbin/munin19:05:210
2419991747,31cyclictest10032-21latency_hist23:50:040
2419991677,14cyclictest4900-21apt-get19:18:170
24199916724,122cyclictest1408-21nginx20:10:030
2419991646,14cyclictest17712-21apt-get20:12:060
2419991637,135cyclictest27108-21/usr/sbin/munin22:50:030
24199916152,89cyclictest11909-21seq23:55:410
24199916125,114cyclictest1305-21snmpd20:45:020
24199916047,96cyclictest3650irq/20-4900000020:57:090
24199916046,97cyclictest3650irq/20-4900000020:22:100
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional