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2025-12-26 - 20:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack8slot0.osadl.org (updated Fri Dec 26, 2025 12:44:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
"interval":200,6620
"cycles":100000000,6619
"load":"idle",6618
"condition":{6617
"clock":"2300"6615
"family":"x86",6614
"vendor":"Intel",6613
"processor":{6611
"dataset":"2024-01-08T15:38:01+01:00"6609
"origin":"2024-01-08T12:43:21+01:00",6608
"timestamps":{6607
"granularity":"microseconds"6605
2320:44:016603
23,20:44:016602
31,20:44:096601
28,20:44:066600
"maxima":[6599
020:43:386596
0,20:43:386595
0,20:43:386594
0,20:43:386593
0,20:43:386592
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0,20:43:386568
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*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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