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2025-12-21 - 02:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack8slot4.osadl.org (updated Sat Dec 20, 2025 12:44:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27699992241178,21sleep50-21swapper/507:06:015
27700452234175,19sleep40-21swapper/407:06:404
27701412230171,21sleep70-21swapper/707:08:037
27722072227170,19sleep10-21swapper/107:09:501
27699552227172,17sleep60-21swapper/607:05:216
27721882226172,17sleep00-21swapper/007:09:330
27701362222168,17sleep20-21swapper/207:07:592
27701582213184,18sleep30-21swapper/307:08:163
2772454993127,3cyclictest2951837-21turbostat.cron12:40:015
277244499311,29cyclictest2791879-21sh07:45:022
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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