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2026-06-27 - 17:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack8slot4.osadl.org (updated Sat Jun 27, 2026 12:44:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
25097292258173,19sleep10-21swapper/107:06:351
25097292258173,19sleep10-21swapper/107:06:351
25098712239175,19sleep40-21swapper/407:08:394
25098712239175,19sleep40-21swapper/407:08:394
25099002233174,48sleep60-21swapper/607:09:056
25099002233174,48sleep60-21swapper/607:09:056
25096902229172,19sleep00-21swapper/007:06:010
25096902229172,19sleep00-21swapper/007:06:010
25097692224167,46sleep50-21swapper/507:07:115
25097692224167,46sleep50-21swapper/507:07:115
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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