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2026-07-02 - 07:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot4.osadl.org (updated Thu Jul 02, 2026 00:44:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
36693212233171,19sleep70-21swapper/719:09:507
36691982229168,49sleep30-21swapper/319:08:013
36690372214185,19sleep20-21swapper/219:05:432
36690612211182,19sleep50-21swapper/519:06:025
36690962204175,19sleep40-21swapper/419:06:334
36691722201173,18sleep60-21swapper/619:07:406
36690932201173,19sleep10-21swapper/119:06:301
36690542201171,20sleep00-21swapper/019:05:570
37494582830,0sleep50-21swapper/521:35:025
3669607993430,3cyclictest1-21systemd20:00:014
366960599330,31cyclictest3822096-21cron23:45:013
366959599330,32cyclictest3710464-21latency_hist20:25:020
366960599320,31cyclictest3769414-21latency_hist22:10:013
3669613993127,3cyclictest1-21systemd21:00:027
366961399310,3cyclictest3690462-21cron19:50:017
366961099310,3cyclictest3788367-21tr22:45:015
366961099310,29cyclictest0-21swapper/521:25:015
3669607993126,4cyclictest1-21systemd20:50:024
366960799310,30cyclictest3802141-21cron23:10:014
366960199310,29cyclictest3853323-21unin-run00:40:022
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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