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2026-05-22 - 10:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot4.osadl.org (updated Fri May 22, 2026 00:44:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27161892235174,20sleep20-21swapper/219:08:462
27161942231166,20sleep70-21swapper/719:08:507
27162562227165,19sleep40-21swapper/419:09:444
27161812227165,20sleep30-21swapper/319:08:393
27160962225165,19sleep10-21swapper/119:07:241
27161002209179,19sleep50-21swapper/519:07:285
27160452209180,19sleep00-21swapper/019:06:420
27160332202172,20sleep60-21swapper/619:06:326
2716473993432,1cyclictest2753289-21cron20:15:020
2716484993327,5cyclictest290-21plymouthd19:20:024
271648499330,32cyclictest0-21swapper/419:30:114
2716490993227,3cyclictest2728284-21kworker/u32:3+ext4-rsv-conversion23:15:017
271649099320,31cyclictest2814663-21cron22:05:017
271648699320,4cyclictest2747749-21cron20:05:025
271648499320,27cyclictest0-21swapper/420:50:114
2716473993129,1cyclictest2745022-21920:00:020
2716473993128,2cyclictest2853687-21echo23:15:020
2716473993126,4cyclictest2825784-21cron22:25:010
271649099300,29cyclictest0-21swapper/723:15:127
2716489993028,1cyclictest0-21swapper/620:20:106
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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