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2026-07-21 - 23:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot4.osadl.org (updated Tue Jul 21, 2026 12:44:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7473532227165,52sleep30-21swapper/307:07:283
7473452222161,19sleep40-21swapper/407:07:214
7472072222166,45sleep60-21swapper/607:05:306
7474022215159,45sleep50-21swapper/507:08:115
7472592215188,18sleep10-21swapper/107:06:141
7473772209180,19sleep00-21swapper/007:07:500
7473952208179,19sleep70-21swapper/707:08:057
7472602205177,18sleep20-21swapper/207:06:152
74865599431,38cyclictest1-21systemd09:55:013
74866499340,28cyclictest0-21swapper/607:59:586
74866299340,32cyclictest279850-21systemd-journal10:20:005
74866499330,1cyclictest0-21swapper/609:20:026
748658993333,0cyclictest0-21swapper/409:05:014
748668993227,5cyclictest0-21swapper/708:00:017
74866899320,31cyclictest0-21swapper/712:19:567
74866499320,1cyclictest818043-21awk09:15:016
748646993227,4cyclictest279850-21systemd-journal11:20:010
74866899310,29cyclictest0-21swapper/708:09:347
748664993128,3cyclictest0-21swapper/607:35:016
748664993127,4cyclictest0-21swapper/608:05:016
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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