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2022-07-05 - 14:00

x86 Intel Core i7-3770 @3400 MHz, Linux 3.18.69-rt75 (Profile)

Latency plot of system in rack #8, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100, highest latencies:
System rack8slot5.osadl.org (updated Tue Jul 05, 2022 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
645428958,8sleep40-21swapper/416:50:524
648328160,8sleep60-21swapper/616:51:186
648227958,8sleep50-21swapper/516:51:175
645727049,8sleep70-21swapper/716:50:557
452126544,8sleep30-21swapper/316:49:233
668326039,8sleep00-21swapper/016:54:090
647926049,8sleep20-21swapper/216:51:142
648725140,8sleep10-21swapper/116:51:211
6830991714,2cyclictest0-21swapper/420:27:034
683099160,15cyclictest0-21swapper/422:02:574
683099160,15cyclictest0-21swapper/419:56:484
6824991613,2cyclictest0-21swapper/219:11:122
6823991611,4cyclictest0-21swapper/118:09:271
683099150,14cyclictest0-21swapper/420:55:024
6825991512,2cyclictest0-21swapper/318:14:313
6824991512,2cyclictest0-21swapper/220:36:042
682499150,14cyclictest0-21swapper/220:57:012
682499150,14cyclictest0-21swapper/219:55:202
682399150,14cyclictest0-21swapper/117:59:151
682299150,14cyclictest0-21swapper/021:21:010
682299150,14cyclictest0-21swapper/019:55:150
682299150,14cyclictest0-21swapper/017:24:360
6850991411,2cyclictest0-21swapper/721:25:217
6850991411,2cyclictest0-21swapper/720:25:117
6850991411,2cyclictest0-21swapper/718:39:287
685099140,13cyclictest0-21swapper/721:57:357
6843991411,2cyclictest0-21swapper/622:19:256
6843991411,2cyclictest0-21swapper/621:44:286
6843991411,2cyclictest0-21swapper/621:25:176
6843991411,2cyclictest0-21swapper/620:35:386
6843991411,2cyclictest0-21swapper/620:25:116
6843991411,2cyclictest0-21swapper/618:14:326
6843991411,2cyclictest0-21swapper/618:09:366
684399140,13cyclictest0-21swapper/622:02:566
684399140,13cyclictest0-21swapper/620:54:166
6836991411,2cyclictest0-21swapper/521:55:315
6836991411,2cyclictest0-21swapper/520:37:255
6836991411,2cyclictest0-21swapper/520:27:345
6836991411,2cyclictest0-21swapper/519:34:295
6830991411,2cyclictest0-21swapper/421:55:114
6830991411,2cyclictest0-21swapper/421:03:174
6830991411,2cyclictest0-21swapper/420:49:234
6830991411,2cyclictest0-21swapper/420:36:014
6830991411,2cyclictest0-21swapper/419:34:234
683099140,13cyclictest0-21swapper/421:39:014
683099140,13cyclictest0-21swapper/421:19:204
6825991411,2cyclictest0-21swapper/322:14:133
6825991411,2cyclictest0-21swapper/321:25:133
6825991411,2cyclictest0-21swapper/321:03:313
6825991411,2cyclictest0-21swapper/320:35:433
6825991411,2cyclictest0-21swapper/320:26:163
6825991411,2cyclictest0-21swapper/319:58:463
6825991411,2cyclictest0-21swapper/319:39:313
6825991411,2cyclictest0-21swapper/318:49:243
682599140,13cyclictest0-21swapper/317:14:313
682599140,13cyclictest0-21swapper/317:14:313
6824991411,2cyclictest0-21swapper/221:25:262
6824991411,2cyclictest0-21swapper/220:27:092
6824991411,2cyclictest0-21swapper/219:18:572
6824991411,2cyclictest0-21swapper/217:39:322
682399146,5cyclictest0-21swapper/120:58:151
6823991412,2cyclictest0-21swapper/120:27:121
6823991411,2cyclictest0-21swapper/120:36:541
6823991411,2cyclictest0-21swapper/119:56:091
682399140,13cyclictest0-21swapper/121:29:361
6822991411,2cyclictest0-21swapper/021:03:230
6822991411,2cyclictest0-21swapper/020:37:100
6822991411,2cyclictest0-21swapper/020:26:400
6822991411,2cyclictest0-21swapper/019:44:240
6822991411,2cyclictest0-21swapper/019:34:240
682299140,13cyclictest0-21swapper/021:29:360
682299140,13cyclictest0-21swapper/020:56:400
685099136,5cyclictest0-21swapper/720:06:277
685099130,12cyclictest0-21swapper/720:55:577
6843991311,2cyclictest0-21swapper/619:18:446
6843991311,2cyclictest0-21swapper/619:11:036
6843991310,2cyclictest0-21swapper/617:09:346
684399130,12cyclictest0-21swapper/621:32:146
684399130,12cyclictest0-21swapper/619:54:516
6825991311,1cyclictest0-21swapper/321:55:323
682599130,12cyclictest0-21swapper/317:24:313
6824991310,1cyclictest0-21swapper/218:59:232
6823991311,2cyclictest0-21swapper/122:09:231
6823991311,2cyclictest0-21swapper/122:09:231
6823991310,2cyclictest0-21swapper/120:49:241
6822991311,2cyclictest0-21swapper/021:55:340
682299130,12cyclictest0-21swapper/022:00:470
683699120,11cyclictest0-21swapper/522:00:535
683699120,11cyclictest0-21swapper/519:57:095
685099110,9cyclictest0-21swapper/720:41:387
682399119,1cyclictest0-21swapper/121:54:591
685099107,2cyclictest0-21swapper/719:46:127
685099103,3cyclictest0-21swapper/719:07:077
684399100,9cyclictest0-21swapper/621:39:186
683099100,9cyclictest0-21swapper/421:30:234
682599100,9cyclictest0-21swapper/320:50:083
682499100,2cyclictest0-21swapper/221:43:002
68509996,3cyclictest0-21swapper/721:49:497
68509994,5cyclictest0-21swapper/717:49:187
68509993,3cyclictest0-21swapper/721:41:247
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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