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2022-10-07 - 17:18

x86 Intel Core i7-3770 @3400 MHz, Linux 3.18.69-rt75 (Profile)

Latency plot of system in rack #8, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack8slot5.osadl.org (updated Fri Oct 07, 2022 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3041427554,8sleep60-21swapper/603:30:126
3042427352,18sleep70-21swapper/703:30:217
3035626443,8sleep40-21swapper/403:29:224
3039326039,8sleep50-21swapper/503:29:555
3026925926,8sleep30-21swapper/303:28:083
3022125832,23sleep20-21swapper/203:27:272
2826625634,19sleep10-21swapper/103:25:341
2915725029,8sleep00-21swapper/003:25:490
30574991613,2cyclictest0-21swapper/708:22:307
3057399160,15cyclictest0-21swapper/606:01:456
3055599160,15cyclictest0-21swapper/208:37:232
30558991512,2cyclictest0-21swapper/308:21:293
30558991512,2cyclictest0-21swapper/305:58:133
3055899150,14cyclictest0-21swapper/308:10:203
3055899150,14cyclictest0-21swapper/305:30:263
3055599150,14cyclictest0-21swapper/208:45:592
30554991512,2cyclictest0-21swapper/108:20:381
30574991411,2cyclictest0-21swapper/708:38:357
30574991411,2cyclictest0-21swapper/707:01:047
30574991411,2cyclictest0-21swapper/706:33:477
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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