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2026-04-13 - 18:28

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #8, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot6s.osadl.org (updated Mon Apr 13, 2026 12:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9051993939,0cyclictest8352-21fwupd12:18:293
9051991918,1cyclictest65850irq/126-lan10:09:083
9051991918,1cyclictest65850irq/126-lan10:09:083
9051991917,2cyclictest65850irq/126-lan09:20:133
9051991818,0cyclictest65850irq/126-lan11:50:153
9051991818,0cyclictest65850irq/126-lan09:12:193
9051991817,1cyclictest65850irq/126-lan10:20:133
9051991817,1cyclictest65850irq/126-lan10:15:233
9051991817,1cyclictest65850irq/126-lan08:30:153
9051991717,0cyclictest65850irq/126-lan12:10:193
9051991717,0cyclictest65850irq/126-lan10:55:003
9051991717,0cyclictest65850irq/126-lan08:25:203
9051991716,1cyclictest65850irq/126-lan12:30:213
9051991716,1cyclictest65850irq/126-lan11:45:173
9051991716,1cyclictest65850irq/126-lan11:00:133
9051991716,1cyclictest65850irq/126-lan10:10:123
9051991716,1cyclictest65850irq/126-lan09:45:183
9051991616,0cyclictest65850irq/126-lan09:50:143
9051991616,0cyclictest65850irq/126-lan09:25:213
9051991616,0cyclictest65850irq/126-lan09:00:443
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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