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2026-03-09 - 19:02

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #8, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot6s.osadl.org (updated Mon Mar 09, 2026 12:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
18049992018,2cyclictest65850irq/126-lan10:30:202
18049992018,2cyclictest65850irq/126-lan10:00:192
18049991918,1cyclictest65850irq/126-lan12:10:152
18049991918,1cyclictest65850irq/126-lan07:40:112
18049991817,1cyclictest65850irq/126-lan11:50:112
18049991817,1cyclictest65850irq/126-lan11:35:182
18049991817,1cyclictest65850irq/126-lan07:28:082
18049991817,1cyclictest65850irq/126-lan07:20:122
18049991817,1cyclictest65850irq/126-lan07:13:122
18049991816,2cyclictest65850irq/126-lan09:25:132
18049991717,0cyclictest65850irq/126-lan11:45:202
18049991717,0cyclictest65850irq/126-lan10:05:082
18049991717,0cyclictest65850irq/126-lan09:20:112
18049991717,0cyclictest65850irq/126-lan09:15:082
18049991716,1cyclictest65850irq/126-lan10:50:302
18049991716,1cyclictest65850irq/126-lan07:15:202
18049991715,2cyclictest65850irq/126-lan11:30:172
18049991715,2cyclictest65850irq/126-lan08:25:212
18049991616,0cyclictest65850irq/126-lan12:09:582
18049991616,0cyclictest65850irq/126-lan11:10:332
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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