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2026-01-05 - 02:42

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #8, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot6s.osadl.org (updated Sun Jan 04, 2026 12:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
32227991918,1cyclictest65850irq/126-lan07:37:230
32227991918,1cyclictest65850irq/126-lan07:20:150
32241991818,0cyclictest743-21snmpd11:56:173
32241991818,0cyclictest743-21snmpd07:56:273
32241991818,0cyclictest743-21snmpd07:36:323
32241991818,0cyclictest743-21snmpd07:34:453
32227991818,0cyclictest65850irq/126-lan11:40:150
32227991818,0cyclictest65850irq/126-lan08:11:170
32227991817,1cyclictest65850irq/126-lan11:55:240
32241991717,0cyclictest743-21snmpd12:13:563
32241991717,0cyclictest743-21snmpd12:13:563
32241991717,0cyclictest743-21snmpd11:36:193
32241991717,0cyclictest4565-21cat08:35:133
32241991717,0cyclictest30853-21cat09:40:143
32241991717,0cyclictest18706-21cat09:10:143
32241991717,0cyclictest17820-21cat11:45:153
32227991717,0cyclictest743-21snmpd09:54:070
32227991717,0cyclictest743-21snmpd07:16:440
32227991717,0cyclictest65850irq/126-lan11:14:530
32227991717,0cyclictest65850irq/126-lan10:34:300
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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