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2025-05-05 - 00:13

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #8, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot6s.osadl.org (updated Sun May 04, 2025 12:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
26483991919,0cyclictest65850irq/126-lan12:39:312
26483991918,1cyclictest65850irq/126-lan12:12:072
26483991818,0cyclictest765-21snmpd12:04:492
26483991818,0cyclictest765-21snmpd07:53:072
26483991818,0cyclictest65850irq/126-lan12:25:172
26483991818,0cyclictest65850irq/126-lan11:58:262
26483991818,0cyclictest65850irq/126-lan11:45:122
26483991818,0cyclictest65850irq/126-lan11:43:022
26483991818,0cyclictest65850irq/126-lan11:36:112
26483991818,0cyclictest65850irq/126-lan11:10:152
26483991818,0cyclictest65850irq/126-lan11:01:592
26483991818,0cyclictest65850irq/126-lan09:41:012
26483991818,0cyclictest65850irq/126-lan09:25:092
26483991818,0cyclictest65850irq/126-lan09:24:302
26483991817,1cyclictest9870-21kworker/2:2+events10:57:302
26483991817,1cyclictest9870-21kworker/2:2+events10:53:212
26483991817,1cyclictest9870-21kworker/2:2+events10:37:252
26483991817,1cyclictest65850irq/126-lan12:19:392
26483991817,1cyclictest65850irq/126-lan11:20:032
26483991817,1cyclictest65850irq/126-lan10:30:132
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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