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2026-03-15 - 00:32

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #8, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot6s.osadl.org (updated Sat Mar 14, 2026 12:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
18268992019,1cyclictest65850irq/126-lan11:34:223
18268991918,1cyclictest65850irq/126-lan11:15:113
18263991918,1cyclictest65850irq/126-lan07:45:252
18268991817,1cyclictest65850irq/126-lan12:30:103
18268991817,1cyclictest65850irq/126-lan10:05:133
18263991817,1cyclictest65850irq/126-lan09:40:002
18268991717,0cyclictest65850irq/126-lan10:36:233
18268991716,1cyclictest65850irq/126-lan12:25:143
18268991716,1cyclictest65850irq/126-lan12:15:133
18268991716,1cyclictest65850irq/126-lan12:10:203
18268991716,1cyclictest65850irq/126-lan10:30:013
18268991716,1cyclictest65850irq/126-lan09:45:133
18263991717,0cyclictest65850irq/126-lan08:40:152
18263991716,1cyclictest65850irq/126-lan09:05:132
18263991716,1cyclictest65850irq/126-lan07:30:122
18268991616,0cyclictest65850irq/126-lan12:20:173
18268991616,0cyclictest65850irq/126-lan10:10:183
18268991616,0cyclictest65850irq/126-lan10:02:193
18268991615,1cyclictest65850irq/126-lan12:00:153
18268991615,1cyclictest65850irq/126-lan10:40:183
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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