You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-11-08 - 19:51

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #8, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack8slot6s.osadl.org (updated Sat Nov 08, 2025 12:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31068993434,0cyclictest10908-21fwupd08:57:343
31064991919,0cyclictest66850irq/125-lan12:14:512
31064991919,0cyclictest66850irq/125-lan10:03:292
31064991918,1cyclictest66850irq/125-lan12:35:222
31064991918,1cyclictest66850irq/125-lan11:40:122
31064991918,1cyclictest66850irq/125-lan11:07:172
31064991918,1cyclictest66850irq/125-lan10:44:162
31064991918,1cyclictest66850irq/125-lan10:30:172
31064991918,1cyclictest66850irq/125-lan09:55:172
31064991818,0cyclictest66850irq/125-lan10:55:032
31064991818,0cyclictest66850irq/125-lan10:51:482
31064991818,0cyclictest66850irq/125-lan09:51:262
31064991818,0cyclictest66850irq/125-lan09:31:362
31064991817,1cyclictest66850irq/125-lan12:31:232
31064991817,1cyclictest66850irq/125-lan12:15:162
31064991817,1cyclictest66850irq/125-lan11:45:172
31064991817,1cyclictest66850irq/125-lan11:25:222
31064991817,1cyclictest66850irq/125-lan11:22:002
31064991817,1cyclictest66850irq/125-lan10:12:292
31064991817,1cyclictest66850irq/125-lan09:23:032
31064991817,1cyclictest66850irq/125-lan09:10:152
31064991817,1cyclictest66850irq/125-lan07:55:232
31064991717,0cyclictest66850irq/125-lan11:30:472
31064991717,0cyclictest66850irq/125-lan10:25:472
31064991717,0cyclictest66850irq/125-lan09:05:282
31064991717,0cyclictest66850irq/125-lan08:20:192
31064991717,0cyclictest66850irq/125-lan08:05:272
31064991717,0cyclictest66850irq/125-lan07:30:162
31064991716,1cyclictest66850irq/125-lan12:25:202
31064991716,1cyclictest66850irq/125-lan12:22:382
31064991716,1cyclictest66850irq/125-lan12:05:182
31064991716,1cyclictest66850irq/125-lan12:02:572
31064991716,1cyclictest66850irq/125-lan11:55:182
31064991716,1cyclictest66850irq/125-lan11:50:192
31064991716,1cyclictest66850irq/125-lan11:00:012
31064991716,1cyclictest66850irq/125-lan10:45:142
31064991716,1cyclictest66850irq/125-lan10:37:092
31064991716,1cyclictest66850irq/125-lan10:23:502
31064991716,1cyclictest66850irq/125-lan10:08:102
31064991716,1cyclictest66850irq/125-lan09:45:182
31064991716,1cyclictest66850irq/125-lan09:40:272
31064991716,1cyclictest66850irq/125-lan09:38:542
31064991716,1cyclictest66850irq/125-lan08:49:532
31064991716,1cyclictest66850irq/125-lan08:35:142
31064991716,1cyclictest66850irq/125-lan07:25:222
31064991616,0cyclictest66850irq/125-lan11:36:422
31064991616,0cyclictest66850irq/125-lan09:00:322
31064991616,0cyclictest66850irq/125-lan08:04:142
31064991615,1cyclictest66850irq/125-lan11:12:562
31064991615,1cyclictest66850irq/125-lan10:15:122
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional