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2026-07-02 - 12:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack8slot7.osadl.org (updated Thu Jul 02, 2026 00:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
29422991817,1cyclictest59550irq/125-lan21:05:140
29422991817,1cyclictest59550irq/125-lan20:20:150
29422991817,1cyclictest59550irq/125-lan20:10:170
29422991817,1cyclictest59550irq/125-lan19:10:210
29422991717,0cyclictest59550irq/125-lan22:55:200
29422991717,0cyclictest59550irq/125-lan22:00:170
29422991716,1cyclictest59550irq/125-lan20:00:210
29422991716,1cyclictest59550irq/125-lan19:25:160
29422991716,1cyclictest59550irq/125-lan00:20:140
29422991716,1cyclictest59550irq/125-lan00:10:190
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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