You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-08-30 - 01:31
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack8slot7.osadl.org (updated Fri Aug 29, 2025 12:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
32216994545,0cyclictest8144-21fwupd07:27:121
32220991918,1cyclictest60250irq/125-lan11:25:222
32220991918,1cyclictest60250irq/125-lan10:16:092
32220991918,1cyclictest60250irq/125-lan09:52:112
32220991918,1cyclictest60250irq/125-lan08:30:142
32220991917,1cyclictest60250irq/125-lan09:00:192
32220991817,1cyclictest60250irq/125-lan09:25:152
32220991717,0cyclictest60250irq/125-lan11:50:122
32220991717,0cyclictest60250irq/125-lan11:24:122
32220991717,0cyclictest60250irq/125-lan11:05:162
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional