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2025-11-23 - 08:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot7.osadl.org (updated Sun Nov 23, 2025 00:43:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3197991818,0cyclictest60250irq/125-lan21:19:572
3197991818,0cyclictest60250irq/125-lan00:14:132
3197991817,1cyclictest60250irq/125-lan23:10:012
3197991817,1cyclictest60250irq/125-lan21:55:212
3197991717,0cyclictest60250irq/125-lan22:39:112
3197991717,0cyclictest60250irq/125-lan22:15:292
3197991717,0cyclictest60250irq/125-lan20:25:212
3197991716,1cyclictest60250irq/125-lan23:47:102
3197991716,1cyclictest60250irq/125-lan23:30:182
3197991716,1cyclictest60250irq/125-lan23:10:162
3197991716,1cyclictest60250irq/125-lan20:50:132
3197991716,1cyclictest60250irq/125-lan20:00:242
3197991716,1cyclictest60250irq/125-lan19:55:232
3197991716,1cyclictest60250irq/125-lan00:25:212
3197991715,1cyclictest60250irq/125-lan00:35:182
3197991616,0cyclictest60250irq/125-lan23:40:162
3197991616,0cyclictest60250irq/125-lan23:21:112
3197991616,0cyclictest60250irq/125-lan22:15:002
3197991616,0cyclictest60250irq/125-lan19:31:492
3197991615,1cyclictest60250irq/125-lan23:55:262
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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