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2026-08-29 - 02:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot7.osadl.org (updated Sat Aug 29, 2026 00:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
8934993535,0cyclictest6668-21fwupd21:20:283
8922992018,1cyclictest59550irq/125-lan22:54:400
8922991918,1cyclictest59550irq/125-lan23:05:140
8922991918,1cyclictest59550irq/125-lan22:37:400
8922991918,1cyclictest59550irq/125-lan21:25:360
8922991918,1cyclictest59550irq/125-lan21:20:090
8922991917,1cyclictest59550irq/125-lan23:30:500
8922991917,1cyclictest59550irq/125-lan23:17:380
8922991917,1cyclictest59550irq/125-lan23:01:380
8922991917,1cyclictest59550irq/125-lan22:32:540
8922991917,1cyclictest59550irq/125-lan22:01:270
8922991917,1cyclictest59550irq/125-lan21:58:090
8922991917,1cyclictest59550irq/125-lan21:44:040
8922991818,0cyclictest59550irq/125-lan23:27:520
8922991818,0cyclictest59550irq/125-lan23:11:280
8922991818,0cyclictest59550irq/125-lan22:09:560
8922991818,0cyclictest59550irq/125-lan00:15:140
8922991817,1cyclictest59550irq/125-lan23:55:190
8922991817,1cyclictest59550irq/125-lan23:53:450
8922991817,1cyclictest59550irq/125-lan23:40:570
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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