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2026-05-11 - 10:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot7.osadl.org (updated Mon May 11, 2026 00:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22708993232,0cyclictest32290-21fwupd22:12:432
22695991717,0cyclictest59550irq/125-lan22:26:270
22695991717,0cyclictest59550irq/125-lan22:20:140
22695991717,0cyclictest59550irq/125-lan19:28:260
22695991717,0cyclictest59550irq/125-lan00:23:230
22695991717,0cyclictest59550irq/125-lan00:16:400
22695991716,1cyclictest59550irq/125-lan21:00:110
22695991716,1cyclictest59550irq/125-lan20:55:120
22695991716,1cyclictest59550irq/125-lan20:35:200
22695991716,1cyclictest59550irq/125-lan20:25:120
22695991716,1cyclictest59550irq/125-lan20:20:130
22695991716,1cyclictest59550irq/125-lan20:15:120
22695991716,1cyclictest59550irq/125-lan19:50:020
22695991716,1cyclictest59550irq/125-lan19:45:110
22695991716,1cyclictest59550irq/125-lan19:10:200
22695991716,1cyclictest59550irq/125-lan00:10:110
22695991616,0cyclictest59550irq/125-lan23:42:260
22695991616,0cyclictest59550irq/125-lan23:00:190
22695991615,1cyclictest59550irq/125-lan23:55:160
22695991615,1cyclictest59550irq/125-lan23:35:220
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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