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2026-09-01 - 02:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack8slot7.osadl.org (updated Tue Sep 01, 2026 00:43:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20652994343,0cyclictest30335-21fwupd23:54:433
20652992323,0cyclictest325-21hwrng22:06:183
20639992019,1cyclictest59550irq/125-lan21:53:100
20639992018,1cyclictest59550irq/125-lan23:43:270
20639992018,1cyclictest59550irq/125-lan22:00:480
20652991919,0cyclictest325-21hwrng23:31:173
20639991919,0cyclictest59550irq/125-lan20:30:180
20639991919,0cyclictest325-21hwrng21:55:020
20639991918,1cyclictest59550irq/125-lan23:16:100
20639991918,1cyclictest59550irq/125-lan23:10:260
20639991918,1cyclictest59550irq/125-lan22:55:180
20639991918,1cyclictest59550irq/125-lan22:35:300
20639991918,1cyclictest59550irq/125-lan00:32:330
20639991918,1cyclictest59550irq/125-lan00:17:350
20639991917,1cyclictest59550irq/125-lan23:45:130
20639991917,1cyclictest59550irq/125-lan23:37:220
20639991917,1cyclictest59550irq/125-lan23:07:520
20639991917,1cyclictest59550irq/125-lan21:13:350
20639991917,1cyclictest59550irq/125-lan00:37:560
20639991917,1cyclictest59550irq/125-lan00:03:340
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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