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2023-10-03 - 15:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack8slot8.osadl.org (updated Sun Jul 28, 2019 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
18642214176,26sleep10-21swapper/11
18642214176,26sleep10-21swapper/11
18317213473,25sleep00-21swapper/00
18317213473,25sleep00-21swapper/00
23822730,2sleep02381-21wc0
248772500,6sleep121-21ksoftirqd/11
1882799441,29cyclictest13646-21systemd-logind1
1882799381,33cyclictest11731-21grep1
1882799380,11cyclictest0-21swapper/11
1882099371,12cyclictest269062awk0
1882099371,12cyclictest269062awk0
1882799364,5cyclictest13652-21sssd_kcm1
1882799361,10cyclictest0-21swapper/11
18827993513,4cyclictest20854-21cat1
1882099354,4cyclictest121rcu_preempt0
1882099351,31cyclictest535-21systemd-journal0
6462341,18sleep0650-21bash0
1882799349,4cyclictest21325-1kworker/u9:21
1882799341,26cyclictest13652-21sssd_kcm1
1882799339,6cyclictest21-21ksoftirqd/11
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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