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2025-06-17 - 02:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack9slot4.osadl.org (updated Mon Jun 16, 2025 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27448113373sleep0-21swapper/121:17:431
27366110975sleep0-21swapper/021:17:390
221501050irq/18-spi_topc2757699cyclictest23:17:531
27569991018cyclictest0-21swapper/022:08:050
2756999967cyclictest0-21swapper/001:23:120
5350930irq/18-pch-dma480-21systemd-journal00:58:270
2756999928cyclictest0-21swapper/022:43:160
27569999266cyclictest0-21swapper/001:13:470
2756999918cyclictest0-21swapper/021:33:010
2756999898cyclictest0-21swapper/021:58:470
5350880irq/18-pch-dma1866-21latency_hist01:07:520
2756999888cyclictest0-21swapper/023:38:200
2756999887cyclictest0-21swapper/000:04:550
2756999879cyclictest0-21swapper/001:53:130
2756999877cyclictest0-21swapper/022:47:580
27569998764cyclictest0-21swapper/023:33:100
2756999858cyclictest0-21swapper/023:43:060
2756999857cyclictest0-21swapper/021:48:010
27569998513cyclictest0-21swapper/002:24:000
2756999847cyclictest0-21swapper/002:44:000
2756999835cyclictest31ksoftirqd/021:42:460
2756999818cyclictest0-21swapper/021:18:000
2756999818cyclictest0-21swapper/001:58:430
2756999817cyclictest0-21swapper/022:42:270
2756999808cyclictest0-21swapper/002:18:290
2756999807cyclictest0-21swapper/023:28:240
2756999807cyclictest0-21swapper/002:03:240
2756999806cyclictest0-21swapper/022:32:270
27569998057cyclictest0-21swapper/022:03:030
22150800irq/18-spi_topc2757699cyclictest01:24:281
2756999797cyclictest0-21swapper/023:18:030
27569997969cyclictest74-21mmcqd/000:08:250
27569997969cyclictest31ksoftirqd/023:13:240
27569997913cyclictest0-21swapper/023:10:280
2756999788cyclictest0-21swapper/021:28:050
2756999787cyclictest0-21swapper/000:51:070
27569997866cyclictest74-21mmcqd/021:27:460
2756999778cyclictest0-21swapper/023:22:550
2756999778cyclictest0-21swapper/023:22:550
2756999778cyclictest0-21swapper/001:50:030
2756999777cyclictest0-21swapper/021:52:460
6950760irq/18-mmc074-21mmcqd/002:28:180
6950760irq/18-mmc026522-21latency_hist00:42:520
2756999768cyclictest0-21swapper/002:33:590
2756999767cyclictest0-21swapper/022:54:250
6950750irq/18-mmc00-21swapper/000:22:510
2756999758cyclictest0-21swapper/001:08:220
2756999758cyclictest0-21swapper/000:33:260
2756999758cyclictest0-21swapper/000:13:510
2756999756cyclictest31ksoftirqd/001:37:540
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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