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2025-11-28 - 19:24

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #9, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the highest latencies:
System rack9slot4s (updated Fri Nov 28, 2025 12:59:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
258129912411216,19cyclictest26060-21wget07:25:111
258129911191100,15cyclictest23526-21strings08:40:221
258119910951071,19cyclictest0-21swapper/007:25:130
255502613518,29sleep10-21swapper/107:22:571
255652474380,31sleep00-21swapper/007:23:040
44402940,7sleep14439-21latency_hist10:20:011
257872930,2sleep00-21swapper/012:22:020
109262930,8sleep12581299cyclictest10:25:321
83102890,12sleep02581199cyclictest08:00:200
118312870,9sleep02581199cyclictest09:20:140
25811997364,6cyclictest0-21swapper/008:40:220
67842710,2sleep06786-21aten_r4power_po09:15:130
185902580,3sleep0111rcuc/011:07:400
275082570,2sleep027509-21sh11:16:360
189192570,8sleep12581299cyclictest10:00:301
35992540,8sleep02581199cyclictest10:18:520
242242480,23sleep03-21ksoftirqd/010:05:490
14352481,4sleep01458-21ssh10:50:170
181392431,24sleep10-21swapper/110:34:011
25812994212,9cyclictest22-21ksoftirqd/109:40:281
78942390,3sleep1201rcuc/109:15:301
319612390,8sleep00-21swapper/012:29:010
25812993928,9cyclictest137350irq/90-eth011:16:011
2581299391,9cyclictest22-21ksoftirqd/110:56:231
98062381,5sleep19818-21sh11:31:531
53992382,4sleep10-21swapper/109:13:351
25812993820,4cyclictest40950irq/93-i91512:14:091
2581199385,4cyclictest81rcu_preempt11:25:320
151122381,33sleep115126-21ssh11:04:391
25812993731,4cyclictest137350irq/90-eth012:45:491
25812993718,6cyclictest22-21ksoftirqd/109:45:281
25812993716,11cyclictest22-21ksoftirqd/111:20:341
2581299371,4cyclictest81rcu_preempt10:54:031
25811993719,6cyclictest3-21ksoftirqd/011:57:220
25811993711,14cyclictest21032-21ssh12:50:310
2581299367,5cyclictest81rcu_preempt11:28:321
2581299365,5cyclictest81rcu_preempt10:12:361
2581299365,4cyclictest22-21ksoftirqd/111:05:181
25812993615,3cyclictest40950irq/93-i91510:41:511
2581299361,4cyclictest81rcu_preempt09:50:151
2581199362,11cyclictest81rcu_preempt08:51:520
25811993619,6cyclictest3-21ksoftirqd/012:13:120
2581199361,3cyclictest81rcu_preempt09:34:070
2581199361,21cyclictest25076-21cut11:15:010
25812993529,4cyclictest137350irq/90-eth009:39:401
25812993529,4cyclictest137350irq/90-eth009:39:401
2581299351,4cyclictest81rcu_preempt11:40:241
2581199354,4cyclictest81rcu_preempt12:33:120
2581199354,4cyclictest81rcu_preempt09:44:370
150532351,30sleep115064-21ssh09:56:311
89982341,28sleep09127-21df12:05:150
2581299348,4cyclictest81rcu_preempt11:45:141
2581299343,13cyclictest81rcu_preempt10:39:031
25812993428,4cyclictest137350irq/90-eth012:19:511
2581299342,5cyclictest0-21swapper/112:43:531
25812993417,5cyclictest22-21ksoftirqd/111:50:191
2581299341,4cyclictest81rcu_preempt11:56:571
2581199346,4cyclictest81rcu_preempt11:20:030
2581199344,4cyclictest81rcu_preempt09:29:560
2581199341,14cyclictest0-21swapper/010:49:020
25811993411,19cyclictest15654-21ssh12:45:190
25811993410,4cyclictest81rcu_preempt12:35:350
38812331,28sleep11454-21diskmemload12:33:141
2581299337,4cyclictest81rcu_preempt12:07:181
2581299332,4cyclictest81rcu_preempt09:25:501
25812993319,4cyclictest22-21ksoftirqd/112:50:311
25812993316,13cyclictest30121-21unixbench_multi10:45:321
2581299331,5cyclictest81rcu_preempt08:55:001
25812993313,8cyclictest22-21ksoftirqd/107:55:221
2581299331,13cyclictest257882sh12:22:021
2581199337,4cyclictest81rcu_preempt10:29:190
2581199334,4cyclictest81rcu_preempt09:11:150
2581199333,4cyclictest81rcu_preempt12:18:230
2581199333,4cyclictest81rcu_preempt10:38:590
25811993318,7cyclictest0-21swapper/010:00:390
25811993318,5cyclictest3-21ksoftirqd/011:36:370
2581199331,20cyclictest31631-21ssh10:14:380
2581199331,13cyclictest0-21swapper/010:40:150
25811993310,11cyclictest3778-21latency_hist07:50:000
2581299327,5cyclictest79022sh12:37:021
25812993223,5cyclictest2220-21dbus-daemon10:22:331
25812993218,4cyclictest22-21ksoftirqd/108:11:521
25812993217,4cyclictest22-21ksoftirqd/111:36:101
2581299321,5cyclictest81rcu_preempt08:45:121
25812993212,4cyclictest22-21ksoftirqd/108:15:531
2581199323,4cyclictest81rcu_preempt11:00:070
2581199322,4cyclictest81rcu_preempt10:56:520
2581199322,13cyclictest0-21swapper/009:48:490
25811993216,5cyclictest3-21ksoftirqd/007:43:530
2581199321,4cyclictest81rcu_preempt10:31:190
2581199321,4cyclictest81rcu_preempt09:35:150
2581199321,4cyclictest81rcu_preempt09:35:150
252682321,5sleep10-21swapper/110:07:221
217302321,5sleep00-21swapper/011:45:030
168322321,5sleep00-21swapper/009:59:090
2581299318,4cyclictest22-21ksoftirqd/109:00:261
2581299317,4cyclictest81rcu_preempt11:10:241
2581299317,4cyclictest81rcu_preempt09:30:201
2581299316,4cyclictest81rcu_preempt12:00:161
2581299314,4cyclictest81rcu_preempt12:25:461
25812993115,12cyclictest22-21ksoftirqd/109:25:011
2581299311,4cyclictest81rcu_preempt09:09:371
2581299311,4cyclictest81rcu_preempt07:43:331
2581199316,13cyclictest40950irq/93-i91511:40:270
2581199313,4cyclictest81rcu_preempt11:50:510
25811993116,5cyclictest3-21ksoftirqd/009:55:000
2581199311,4cyclictest81rcu_preempt08:48:500
25811993114,6cyclictest3-21ksoftirqd/012:02:230
2581199311,19cyclictest1454-21diskmemload10:20:330
2581199311,16cyclictest10820-21/usr/sbin/munin12:40:190
103192310,4sleep041ktimersoftd/008:05:230
25811993024,4cyclictest3-21ksoftirqd/008:30:320
2581199301,7cyclictest7725-21df_inode11:30:150
25811993014,6cyclictest3-21ksoftirqd/007:33:120
224132301,5sleep10-21swapper/108:38:151
55402291,5sleep00-21swapper/007:54:000
2581299297,4cyclictest81rcu_preempt08:00:131
2581299295,4cyclictest81rcu_preempt07:50:471
2581299294,4cyclictest81rcu_preempt07:47:411
25812992921,4cyclictest32371-21sendmail07:39:591
2581199294,13cyclictest21071-21tr08:35:100
2581199292,15cyclictest0-21swapper/008:21:000
2581199291,8cyclictest31965-21udevd07:36:330
185862291,5sleep00-21swapper/008:27:300
13112291,5sleep00-21swapper/009:08:410
73952281,5sleep00-21swapper/007:58:430
317112281,5sleep00-21swapper/009:01:460
299482281,5sleep00-21swapper/008:58:110
2581299285,4cyclictest81rcu_preempt08:20:211
2581299284,3cyclictest81rcu_preempt08:05:541
2581299283,6cyclictest17119-21/usr/sbin/munin08:25:191
2581299281,4cyclictest81rcu_preempt07:34:081
298152271,5sleep10-21swapper/108:56:491
25811992711,13cyclictest0-21swapper/008:15:160
130262271,5sleep00-21swapper/008:13:310
2581299261,4cyclictest81rcu_preempt08:30:151
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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