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Default latency plot of shadow in rack #9, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8
Special All - All RT - Optimization - Ethernet - Thumbnails - Next

Click here to display the system's profile data or here to proceed to next system.

Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system

Characteristics of the 100 highest latencies:

System rack9slot4s (updated Sat Dec 06, 2025 00:59:03)
Delayed (victim)					Switcher (culprit)			Timestamp	CPU
PID	Prio	Total latency (µs)	T^(,W^*) latency (µs)	Cmd	PID	Prio	Cmd	Timestamp	CPU
2664	99	1236	1195,37	cyclictest	3380	-21	hddtemp_smartct	19:25:16	0
2665	99	1101	1080,18	cyclictest	0	-21	swapper/1	21:10:29	1
2366	2	563	517,31	sleep0	0	-21	swapper/0	19:22:38	0
2315	2	560	518,28	sleep1	0	-21	swapper/1	19:22:04	1
2664	99	196	190,3	cyclictest	0	-21	swapper/0	21:10:30	0
10595	2	103	0,8	sleep0	2664	99	cyclictest	23:23:49	0
18998	2	102	0,2	sleep0	18999	-21	fschecks_time	20:05:14	0
12552	2	99	0,4	sleep0	4	1	ktimersoftd/0	22:18:46	0
30150	2	92	0,8	sleep1	2665	99	cyclictest	23:44:16	1
2665	99	89	84,3	cyclictest	28225	-21	kworker/1:4	19:25:16	1
7986	2	82	0,2	sleep0	7985	-21	mailstats	21:00:28	0
953	2	79	0,3	sleep1	0	-21	swapper/1	00:20:25	1
480	2	77	0,4	sleep1	0	-21	swapper/1	23:46:19	1
14546	2	69	0,3	sleep0	0	-21	swapper/0	00:35:14	0
19772	2	64	0,7	sleep0	2664	99	cyclictest	21:19:20	0
2665	99	59	16,5	cyclictest	22	-21	ksoftirqd/1	00:31:21	1
2665	99	58	15,6	cyclictest	22	-21	ksoftirqd/1	23:53:10	1
2665	99	58	15,6	cyclictest	22	-21	ksoftirqd/1	23:16:18	1
2665	99	58	13,5	cyclictest	22	-21	ksoftirqd/1	22:56:19	1
2665	99	57	16,4	cyclictest	22	-21	ksoftirqd/1	22:51:23	1
2665	99	57	13,6	cyclictest	22	-21	ksoftirqd/1	22:46:55	1
2665	99	57	13,13	cyclictest	22	-21	ksoftirqd/1	23:36:55	1
2665	99	57	12,6	cyclictest	22	-21	ksoftirqd/1	21:23:51	1
2665	99	56	23,4	cyclictest	22	-21	ksoftirqd/1	21:26:52	1
2665	99	56	12,6	cyclictest	22	-21	ksoftirqd/1	21:41:34	1
2665	99	56	12,5	cyclictest	22	-21	ksoftirqd/1	21:34:40	1
2665	99	56	12,5	cyclictest	22	-21	ksoftirqd/1	21:34:40	1
2665	99	56	12,14	cyclictest	22	-21	ksoftirqd/1	23:21:09	1
2665	99	56	11,6	cyclictest	22	-21	ksoftirqd/1	00:35:33	1
2665	99	55	12,5	cyclictest	22	-21	ksoftirqd/1	23:32:48	1
2665	99	55	11,6	cyclictest	22	-21	ksoftirqd/1	23:12:31	1
2665	99	55	11,5	cyclictest	22	-21	ksoftirqd/1	23:57:45	1
2665	99	55	11,5	cyclictest	22	-21	ksoftirqd/1	00:12:39	1
2665	99	54	18,6	cyclictest	22	-21	ksoftirqd/1	22:30:12	1
2665	99	54	11,6	cyclictest	22	-21	ksoftirqd/1	21:47:42	1
2665	99	54	10,6	cyclictest	22	-21	ksoftirqd/1	22:21:53	1
2665	99	53	12,5	cyclictest	22	-21	ksoftirqd/1	22:40:40	1
2665	99	52	22,4	cyclictest	22	-21	ksoftirqd/1	21:17:21	1
2665	99	52	17,15	cyclictest	22	-21	ksoftirqd/1	22:08:04	1
2665	99	52	16,6	cyclictest	22	-21	ksoftirqd/1	22:26:53	1
2665	99	51	24,8	cyclictest	22	-21	ksoftirqd/1	20:15:17	1
2665	99	51	17,6	cyclictest	22	-21	ksoftirqd/1	21:50:12	1
2665	99	51	17,6	cyclictest	22	-21	ksoftirqd/1	21:38:12	1
2665	99	51	17,5	cyclictest	22	-21	ksoftirqd/1	00:04:32	1
2665	99	51	16,6	cyclictest	22	-21	ksoftirqd/1	19:56:49	1
2665	99	51	16,6	cyclictest	22	-21	ksoftirqd/1	00:25:30	1
2665	99	50	17,6	cyclictest	22	-21	ksoftirqd/1	22:37:28	1
2665	99	50	17,5	cyclictest	22	-21	ksoftirqd/1	21:56:58	1
2665	99	50	16,6	cyclictest	22	-21	ksoftirqd/1	19:49:40	1
2665	99	50	16,6	cyclictest	22	-21	ksoftirqd/1	00:50:34	1
2665	99	50	16,5	cyclictest	22	-21	ksoftirqd/1	20:06:13	1
2665	99	50	15,6	cyclictest	22	-21	ksoftirqd/1	23:27:12	1
2665	99	50	15,6	cyclictest	22	-21	ksoftirqd/1	23:00:33	1
2665	99	50	15,6	cyclictest	22	-21	ksoftirqd/1	00:17:27	1
20227	2	50	0,8	sleep1	2665	99	cyclictest	00:40:26	1
2665	99	49	16,6	cyclictest	22	-21	ksoftirqd/1	20:21:38	1
2665	99	49	16,5	cyclictest	22	-21	ksoftirqd/1	22:04:03	1
2665	99	49	16,5	cyclictest	22	-21	ksoftirqd/1	20:01:08	1
2665	99	49	16,5	cyclictest	22	-21	ksoftirqd/1	19:41:38	1
2665	99	49	15,5	cyclictest	22	-21	ksoftirqd/1	22:15:50	1
2665	99	49	15,5	cyclictest	22	-21	ksoftirqd/1	22:11:11	1
2665	99	49	15,5	cyclictest	22	-21	ksoftirqd/1	19:50:06	1
1792	2	49	0,8	sleep0	2664	99	cyclictest	22:40:32	0
2665	99	48	25,12	cyclictest	22	-21	ksoftirqd/1	20:35:11	1
2665	99	48	16,5	cyclictest	22	-21	ksoftirqd/1	23:05:10	1
2665	99	48	15,6	cyclictest	22	-21	ksoftirqd/1	20:25:04	1
2665	99	47	22,12	cyclictest	22	-21	ksoftirqd/1	00:49:44	1
2665	99	47	14,5	cyclictest	22	-21	ksoftirqd/1	20:30:31	1
2664	99	47	1,13	cyclictest	31421	-21	ssh	22:38:08	0
2665	99	46	15,6	cyclictest	22	-21	ksoftirqd/1	20:10:19	1
2665	99	46	14,7	cyclictest	22	-21	ksoftirqd/1	20:55:16	1
12576	2	46	0,7	sleep0	2664	99	cyclictest	21:45:13	0
2665	99	45	11,17	cyclictest	22	-21	ksoftirqd/1	00:05:42	1
2665	99	44	24,4	cyclictest	22	-21	ksoftirqd/1	20:50:24	1
2665	99	44	16,10	cyclictest	22	-21	ksoftirqd/1	20:43:02	1
2665	99	44	13,7	cyclictest	22	-21	ksoftirqd/1	19:30:16	1
2665	99	43	23,9	cyclictest	22	-21	ksoftirqd/1	20:45:22	1
2665	99	43	18,12	cyclictest	22	-21	ksoftirqd/1	21:00:15	1
23791	2	43	0,9	sleep0	2664	99	cyclictest	21:23:09	0
2665	99	42	6,6	cyclictest	22	-21	ksoftirqd/1	19:35:05	1
2665	99	40	25,4	cyclictest	22	-21	ksoftirqd/1	21:08:12	1
27275	2	38	0,6	sleep0	27276	-21	sort	20:25:31	0
2664	99	37	3,4	cyclictest	8	1	rcu_preempt	21:34:06	0
2664	99	37	3,4	cyclictest	8	1	rcu_preempt	21:34:06	0
2664	99	36	2,18	cyclictest	9361	-21	munin-run	00:30:01	0
2664	99	36	12,12	cyclictest	1969	-21	lldpad	21:42:54	0
2664	99	35	1,22	cyclictest	20976	-21	sh	22:26:59	0
2930	2	34	1,29	sleep0	2970	-21	ntp_states	23:15:27	0
2664	99	34	9,4	cyclictest	8	1	rcu_preempt	22:59:21	0
2664	99	34	6,5	cyclictest	8	1	rcu_preempt	22:46:47	0
2664	99	34	6,15	cyclictest	0	-21	swapper/0	20:59:32	0
2664	99	34	4,4	cyclictest	8	1	rcu_preempt	22:53:54	0
2664	99	34	4,4	cyclictest	8	1	rcu_preempt	00:05:38	0
2664	99	34	2,19	cyclictest	0	-21	swapper/0	22:13:32	0
2664	99	34	1,4	cyclictest	8	1	rcu_preempt	23:50:26	0
2664	99	34	1,20	cyclictest	24052	-21	ssh	23:37:24	0
2664	99	34	10,11	cyclictest	0	-21	swapper/0	23:01:34	0
1685	2	34	0,4	sleep0	4	1	ktimersoftd/0	22:07:07	0
11251	2	34	1,4	sleep0	11265	-21	ssh	00:30:45	0
2664	99	33	4,5	cyclictest	8	1	rcu_preempt	00:40:29	0
^Timer ^*Wakeup (latency=timer+wakeup+contextswitch)


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This page was last modified on 2019-05-28 - 00:17