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2026-09-18 - 08:37

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #9, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack9slot5s.osadl.org (updated Fri Sep 18, 2026 01:13:20)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2415:45:157630
38,15:44:517629
015:44:517625
0,15:44:517624
0,15:44:517623
0,15:44:517622
0,15:44:517621
0,15:44:517620
0,15:44:517619
0,15:44:517618
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0,15:44:517614
0,15:44:517613
0,15:44:517612
0,15:44:517611
0,15:44:517610
0,15:44:517609
0,15:44:517608
0,15:44:517607
0,15:44:517606
0,15:44:517605
0,15:44:517604
0,15:44:517603
0,15:44:517602
0,15:44:517601
0,15:44:517600
0,15:44:517599
0,15:44:517598
0,15:44:517597
0,15:44:517596
0,15:44:517595
0,15:44:517594
0,15:44:517593
0,15:44:517592
0,15:44:517591
0,15:44:517590
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0,15:44:517579
0,15:44:517578
0,15:44:517577
0,15:44:517576
0,15:44:517575
0,15:44:517574
0,15:44:517573
0,15:44:517572
0,15:44:517571
0,15:44:517570
0,15:44:517569
0,15:44:517568
0,15:44:517567
0,15:44:517566
0,15:44:517565
0,15:44:517564
0,15:44:517563
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0,15:44:517560
0,15:44:517559
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0,15:44:517550
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0,15:44:517545
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0,15:44:517529
0,15:44:517528
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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