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2025-08-21 - 22:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack9slot6.osadl.org (updated Thu Aug 21, 2025 12:54:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3819:11:585033
36,19:11:205032
38,19:11:205031
24,19:11:205030
019:11:205026
0,19:11:205025
0,19:11:205024
0,19:11:205023
0,19:11:205022
0,19:11:205021
0,19:11:205020
0,19:11:205019
0,19:11:205018
0,19:11:205017
0,19:11:205016
0,19:11:205015
0,19:11:205014
0,19:11:205013
0,19:11:205012
0,19:11:205011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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