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2026-08-11 - 09:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack9slot6.osadl.org (updated Tue Aug 11, 2026 00:53:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3814:17:285033
36,14:16:505032
38,14:16:505031
24,14:16:505030
014:16:505026
0,14:16:505025
0,14:16:505024
0,14:16:505023
0,14:16:505022
0,14:16:505021
0,14:16:505020
0,14:16:505019
0,14:16:505018
0,14:16:505017
0,14:16:505016
0,14:16:505015
0,14:16:505014
0,14:16:505013
0,14:16:505012
0,14:16:505011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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