You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-27 - 11:46
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackaslot0.osadl.org (updated Tue Jan 27, 2026 00:44:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2626621000,1sleep126250-21sshd21:37:261
31902920,0sleep33189-21sshd21:55:353
231702900,0sleep123171-21sshd23:35:491
311842840,0sleep18796-21diskmemload21:14:501
177452650,9sleep217730-21sshd23:38:182
188162610,0sleep10-21swapper/123:52:511
102832600,1sleep210282-21bash21:10:072
217702590,0sleep119-21rcuc/120:35:171
71482580,1sleep00-21swapper/021:53:070
38192580,0sleep010-21rcuc/021:46:580
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional