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2026-04-06 - 20:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Mon Apr 06, 2026 12:44:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2219121050,0sleep322175-21sshd10:33:303
118352980,1sleep211825-21sshd09:57:462
118352980,1sleep211825-21sshd09:57:462
62892970,0sleep36271-21sshd12:19:063
161242970,1sleep00-21swapper/007:09:260
78272880,1sleep37803-21sshd09:20:063
76532630,1sleep27650-21bash10:20:312
11342620,0sleep30-21swapper/311:03:223
167612610,1sleep20-21swapper/211:56:462
43182580,1sleep123605-21diskmemload10:40:281
297102570,1sleep329709-21bash09:42:053
239862570,0sleep20-21swapper/210:50:552
123662570,0sleep012364-21bash11:50:310
281162560,1sleep028096-21sshd11:46:100
250602560,0sleep1201ktimersoftd/109:38:501
165772560,1sleep316571-21rm11:48:053
158432560,0sleep015833-21sshd11:42:130
127622560,0sleep312740-21sshd11:41:563
297032530,1sleep31510-21nfsd11:34:513
152662530,0sleep00-21swapper/011:04:400
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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