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2026-07-12 - 22:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Sun Jul 12, 2026 12:44:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
181812830,0sleep20-21swapper/211:30:232
102992680,1sleep210296-21sshd09:15:242
99632650,6sleep339-21ksoftirqd/310:12:353
308442630,0sleep10-21swapper/110:51:271
126282620,0sleep20-21swapper/210:49:562
301242600,1sleep20-21swapper/209:28:402
184902590,0sleep24694-21cyclictest12:30:282
127512590,6sleep20-21swapper/209:52:502
69902580,1sleep06988-21bash12:03:470
271062580,0sleep20-21swapper/209:59:512
81762560,0sleep30-21swapper/312:29:413
218952560,0sleep10-21swapper/112:02:111
202372560,1sleep337-21rcuc/309:30:333
202372560,1sleep337-21rcuc/309:30:333
220112550,0sleep122010-21bash10:59:211
255462540,0sleep30-21swapper/309:11:063
18772540,0sleep00-21swapper/009:49:050
144472540,0sleep00-21swapper/011:24:240
221802530,0sleep20-21swapper/209:47:582
167602530,0sleep03-21ksoftirqd/011:30:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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