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2025-12-31 - 13:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Wed Dec 31, 2025 00:44:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
214452900,0sleep31734-21runrttasks22:14:143
75872890,0sleep30-21swapper/322:34:093
58222850,2sleep0550799cyclictest21:43:340
178172630,1sleep337-21rcuc/323:20:203
320832620,0sleep121-21ksoftirqd/122:04:461
305292580,1sleep330527-21sshd21:14:173
73672570,0sleep00-21swapper/023:52:140
73672570,0sleep00-21swapper/023:52:130
462925525,15sleep20-21swapper/219:05:352
303772550,0sleep00-21swapper/021:14:140
516625431,19sleep30-21swapper/319:09:253
516025432,18sleep00-21swapper/019:09:220
8582530,0sleep00-21swapper/000:34:250
61612520,0sleep10-21swapper/122:17:001
487325229,19sleep10-21swapper/119:07:201
169332520,0sleep230-21ksoftirqd/222:35:332
265052500,0sleep20-21swapper/222:26:042
325262490,0sleep20-21swapper/221:42:322
222332490,0sleep30-21swapper/323:44:003
314032480,1sleep01734-21runrttasks21:59:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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