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2026-08-30 - 13:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Sun Aug 30, 2026 00:44:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
51062890,0sleep15107-21sshd23:28:581
301502870,0sleep20-21swapper/200:17:342
137612800,0sleep313760-21munin-node22:20:173
142672630,1sleep00-21swapper/000:13:150
32762560,5sleep03-21ksoftirqd/022:01:550
294952550,0sleep00-21swapper/000:02:580
193472550,0sleep17020-21diskmemload23:59:101
152692550,1sleep339-21ksoftirqd/321:30:583
258762540,2sleep11431699cyclictest22:32:571
149132540,0sleep30-21swapper/322:49:213
108092540,0sleep20-21swapper/223:58:232
253212530,0sleep20-21swapper/223:53:552
233082520,0sleep30-21swapper/321:14:183
162412520,0sleep216240-21bash00:10:252
1391725227,21sleep20-21swapper/219:08:102
1373025230,19sleep00-21swapper/019:05:570
37362510,1sleep03723-21sshd21:35:430
226192510,1sleep222601-21sshd22:03:422
87522500,0sleep10-21swapper/121:27:311
1402825037,9sleep30-21swapper/319:09:373
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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