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2026-04-18 - 18:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Sat Apr 18, 2026 12:44:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
212732920,2sleep31630799cyclictest09:21:183
75352870,0sleep223417-21diskmemload09:46:082
140632800,0sleep114058-21cp11:37:111
274942660,1sleep127496-21sshd12:04:351
33182630,1sleep03295-21sshd11:33:200
232872620,1sleep023281-21bash12:07:020
304692600,0sleep10-21swapper/111:15:231
43662590,1sleep20-21swapper/208:35:222
41662560,1sleep21734-21runrttasks12:05:192
226712560,0sleep10-21swapper/109:24:251
208742560,1sleep320873-21sshd11:31:593
231922550,5sleep230-21ksoftirqd/210:07:572
9392540,1sleep1920-21sshd10:11:431
51912540,0sleep20-21swapper/210:17:582
312312540,0sleep10-21swapper/112:28:031
15822540,0sleep00-21swapper/012:25:210
100312540,0sleep023417-21diskmemload12:31:550
158092530,0sleep20-21swapper/210:24:472
130302530,0sleep00-21swapper/010:44:530
300422520,0sleep20-21swapper/211:24:092
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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