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2025-11-24 - 21:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Mon Nov 24, 2025 12:44:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
135522990,0sleep013550-21sshd11:04:200
303512830,1sleep33061999cyclictest10:50:013
311282820,0sleep30-21swapper/311:32:033
2821526428,18sleep00-21swapper/007:05:040
274332600,1sleep31819-21runrttasks10:20:133
29992590,1sleep00-21swapper/012:30:130
44022580,0sleep041ktimersoftd/007:20:130
264302580,1sleep21819-21runrttasks11:10:082
238312570,1sleep323826-21sshd09:53:493
207372560,0sleep20-21swapper/211:52:012
209732550,1sleep31578-21nfsd12:15:593
3031625432,19sleep30-21swapper/307:09:293
3023025430,10sleep10-21swapper/107:08:211
3016725330,19sleep20-21swapper/207:07:352
289702530,1sleep228959-21sshd11:23:462
248322530,1sleep124834-21munin-run08:05:011
34182520,6sleep223311-21diskmemload09:25:002
260562520,0sleep31819-21runrttasks12:00:453
227032520,0sleep10-21swapper/109:23:071
19232510,1sleep11868-21sshd11:20:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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