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2026-01-12 - 05:28
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Mon Jan 12, 2026 00:44:28)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
204662920,0sleep20-21swapper/200:19:252
264012900,1sleep1152399cyclictest22:55:581
144872670,2sleep20-21swapper/223:44:112
263052660,1sleep226299-21sshd22:12:412
179382660,0sleep10-21swapper/121:45:561
90526127,8sleep00-21swapper/019:07:410
167252600,0sleep10-21swapper/100:24:531
137592600,1sleep213760-21sshd22:51:592
100332580,1sleep310036-21sshd00:09:493
305352570,0sleep330536-21sshd00:17:223
82932560,1sleep00-21swapper/021:42:140
35502550,0sleep10-21swapper/123:37:221
78752540,1sleep07850-21sshd22:08:100
288512540,1sleep21734-21runrttasks23:07:492
204622540,1sleep320461-21bash23:35:563
136612540,1sleep10-21swapper/121:22:321
247832530,0sleep00-21swapper/022:50:100
115422530,0sleep20-21swapper/223:26:282
65525230,18sleep20-21swapper/219:05:552
289072520,0sleep30-21swapper/323:16:283
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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