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2026-03-18 - 01:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Tue Mar 17, 2026 12:44:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
228972910,0sleep022867-21sshd11:09:560
87792860,0sleep20-21swapper/211:05:452
54602830,0sleep20-21swapper/211:48:002
152022820,0sleep30-21swapper/311:03:343
258832730,1sleep025881-21bash11:24:220
62522630,1sleep01734-21runrttasks11:36:440
960426226,19sleep00-21swapper/007:09:230
103542590,0sleep10-21swapper/110:48:541
38632580,1sleep23857-21sshd09:45:412
278042570,0sleep327789-21sshd10:10:343
278042570,0sleep327789-21sshd10:10:343
314342560,1sleep010-21rcuc/011:02:070
198872560,0sleep00-21swapper/012:14:500
162222560,0sleep11734-21runrttasks10:18:081
148022550,0sleep00-21swapper/012:08:410
96942540,0sleep117099-21diskmemload11:14:261
31462540,1sleep20-21swapper/210:39:452
151842540,1sleep30-21swapper/310:18:033
133002540,1sleep00-21swapper/009:55:110
128442530,3sleep337-21rcuc/309:52:153
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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