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2026-04-20 - 18:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Mon Apr 20, 2026 12:44:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
29632910,1sleep337-21rcuc/310:36:183
260032880,0sleep00-21swapper/010:32:300
290822840,1sleep21734-21runrttasks07:10:192
65662820,0sleep11734-21runrttasks09:40:031
157402730,2sleep10-21swapper/110:04:471
300252660,0sleep10-21swapper/111:08:461
114242640,1sleep211423-21sshd11:15:552
30252610,1sleep13011-21sshd12:00:041
264642610,0sleep026460-21sshd11:59:160
25512600,0sleep30-21swapper/309:42:373
222882600,0sleep30-21swapper/310:32:093
13572590,0sleep21337-21sshd11:35:542
237362580,0sleep223726-21sshd10:05:252
178402580,2sleep12766999cyclictest12:13:231
93392570,0sleep30-21swapper/311:51:383
50772570,0sleep20-21swapper/212:36:002
169622570,0sleep216959-21bash12:16:132
82792560,1sleep31734-21runrttasks10:45:433
65012560,1sleep02376-21diskmemload11:30:240
258612550,0sleep00-21swapper/010:11:350
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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