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2026-06-25 - 22:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Thu Jun 25, 2026 12:44:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3093821070,0sleep130923-21sshd10:05:461
551021030,0sleep30-21swapper/312:29:463
255502970,0sleep125546-21bash11:47:551
255502970,0sleep125546-21bash11:47:551
179892900,1sleep317983-21bash10:35:573
29512600,1sleep02950-21sshd10:20:230
275322600,1sleep227517-21sshd11:28:092
201682600,7sleep339-21ksoftirqd/310:24:513
185582590,1sleep10-21swapper/112:22:121
133902580,1sleep31596-21sshd11:38:183
285542570,0sleep20-21swapper/210:22:422
284782570,1sleep228462-21sshd11:11:062
113352570,0sleep30-21swapper/310:06:563
198832560,1sleep219882-21sshd11:50:162
198832560,1sleep219882-21sshd11:50:162
117392560,1sleep211732-21sshd12:15:362
105202560,1sleep311991-21diskmemload12:00:513
311372550,0sleep041ktimersoftd/011:54:110
311372550,0sleep041ktimersoftd/011:54:110
271202550,0sleep30-21swapper/309:48:213
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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