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2026-07-31 - 03:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Fri Jul 31, 2026 00:44:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2744321090,0sleep127442-21cp21:38:451
2294821040,3sleep33021899cyclictest23:18:093
313022990,1sleep11621-21nfsd00:27:221
244262830,0sleep20-21swapper/221:44:112
180172620,1sleep118016-21bash22:52:081
2986526126,9sleep10-21swapper/119:08:491
172772590,0sleep00-21swapper/000:34:460
249252580,0sleep224900-21sshd22:12:472
167822580,0sleep00-21swapper/023:48:560
243772570,0sleep10-21swapper/100:12:231
269892560,4sleep00-21swapper/022:47:140
125212550,0sleep312517-21cp21:48:483
2975725432,18sleep20-21swapper/219:07:262
25462530,0sleep00-21swapper/022:25:070
276072520,1sleep337-21rcuc/321:44:273
253342520,1sleep225326-21sshd21:18:432
197622520,0sleep10-21swapper/123:15:031
82932510,0sleep08290-21cp22:22:420
78362510,0sleep30-21swapper/323:08:163
326162510,1sleep222972-21diskmemload21:36:182
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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