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2026-05-12 - 01:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Mon May 11, 2026 12:44:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
266372920,0sleep210864-21diskmemload12:25:222
286642820,0sleep00-21swapper/009:39:570
282726325,19sleep00-21swapper/007:06:370
344826024,18sleep20-21swapper/207:09:442
32102600,0sleep20-21swapper/210:31:562
185402580,1sleep118539-21bash10:41:481
17982570,0sleep01734-21runrttasks09:57:280
17982570,0sleep01734-21runrttasks09:57:280
149242570,0sleep30-21swapper/309:32:593
7972560,1sleep010864-21diskmemload12:34:370
34492560,0sleep20-21swapper/210:54:482
243862560,0sleep124385-21sshd09:19:391
137902560,0sleep119-21rcuc/109:32:531
57912550,0sleep33762-21cyclictest10:55:013
95782540,0sleep10-21swapper/110:38:111
61062540,1sleep16082-21sshd12:26:251
70972530,1sleep21734-21runrttasks12:20:452
70972530,1sleep21734-21runrttasks12:20:452
230632530,0sleep223045-21sshd09:19:332
34742520,0sleep20-21swapper/209:29:102
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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