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2026-07-18 - 23:28
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Sat Jul 18, 2026 12:44:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
222982930,0sleep322282-21sshd11:23:103
121562860,0sleep012148-21cp11:56:400
116222850,1sleep337-21rcuc/310:45:003
167532610,1sleep316731-21sshd11:14:043
151312580,1sleep21734-21runrttasks10:16:292
119182580,0sleep230-21ksoftirqd/209:18:542
3260725721,8sleep00-21swapper/007:05:490
244222570,2sleep1125699cyclictest12:12:091
217112570,1sleep221693-21sshd12:11:522
90852560,0sleep29086-21needreboot07:20:182
81192560,0sleep30-21swapper/312:07:493
316262560,1sleep331627-21bash09:35:003
129092560,1sleep112908-21bash12:08:161
125942550,1sleep312595-21sshd12:34:053
140262540,1sleep01734-21runrttasks11:08:050
99172530,1sleep00-21swapper/009:30:120
82832530,0sleep10-21swapper/110:56:041
67802530,0sleep30-21swapper/311:27:313
30525230,18sleep20-21swapper/207:06:412
217782520,0sleep20-21swapper/209:34:082
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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