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2026-06-09 - 16:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Tue Jun 09, 2026 12:44:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1053421220,0sleep21596-21sshd10:43:382
287372980,0sleep00-21swapper/012:20:080
268842960,1sleep31546699cyclictest10:30:373
202452960,0sleep020215-21sshd12:10:340
17902900,0sleep10-21swapper/111:05:481
62902890,0sleep16289-21bash11:23:231
242972770,0sleep024299-21id09:35:450
184042640,1sleep31734-21runrttasks09:43:573
38032620,0sleep00-21swapper/012:03:250
97002610,1sleep19698-21sshd11:00:481
309112600,0sleep30-21swapper/311:08:283
18102600,1sleep08-21rcu_preempt09:42:260
15272560,2sleep119-21rcuc/111:57:251
311182550,0sleep00-21swapper/009:13:340
318182540,1sleep00-21swapper/011:42:500
28992540,0sleep32898-21sshd10:08:253
250502540,0sleep30-21swapper/311:42:133
75042530,1sleep20-21swapper/212:38:252
47122530,1sleep04710-21sshd09:57:010
235422530,0sleep20-21swapper/210:15:582
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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