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2025-09-10 - 08:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Wed Sep 10, 2025 00:44:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1279221170,0sleep212793-21sshd23:23:042
78272980,0sleep27807-21sshd23:00:482
208092920,0sleep10-21swapper/123:10:121
158832870,0sleep10-21swapper/122:23:291
144782670,0sleep323512-21diskmemload23:31:093
3045526426,19sleep30-21swapper/319:09:093
300662600,1sleep030061-21sshd23:43:290
66012580,1sleep26588-21sshd00:03:232
66012580,1sleep26588-21sshd00:03:232
287682580,0sleep20-21swapper/200:16:012
141232570,1sleep014117-21sshd22:09:500
227912560,1sleep022788-21sshd22:13:150
176232560,0sleep00-21swapper/022:50:410
156272560,0sleep20-21swapper/222:26:062
70862550,1sleep37073-21sshd21:14:233
54052550,1sleep05386-21sshd22:28:010
230562550,0sleep323055-21bash22:07:483
107102550,0sleep10-21swapper/123:03:551
6462540,1sleep223512-21diskmemload23:08:302
144002540,0sleep00-21swapper/000:38:060
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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