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2026-08-27 - 11:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Thu Aug 27, 2026 00:44:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
93832910,0sleep39384-21bash23:10:413
2185426630,19sleep10-21swapper/119:06:411
93312620,0sleep10-21swapper/100:14:531
239172620,0sleep20-21swapper/221:22:112
27592610,0sleep10-21swapper/122:09:221
65312590,1sleep10-21swapper/122:15:231
65312590,1sleep10-21swapper/122:15:231
276072590,1sleep00-21swapper/022:02:510
107032580,1sleep210682-21sshd23:48:342
3492570,1sleep337-21rcuc/300:11:033
310582570,0sleep10-21swapper/122:29:131
2198725735,18sleep30-21swapper/319:08:253
2185825725,18sleep00-21swapper/019:06:440
141042570,1sleep00-21swapper/023:37:150
91682540,0sleep30-21swapper/323:39:463
240122540,0sleep024009-21sshd23:00:240
176962540,1sleep217681-21sshd00:30:132
106042540,0sleep00-21swapper/000:14:590
2199825231,18sleep20-21swapper/219:08:312
213632520,1sleep221360-21sshd22:45:402
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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