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2026-05-28 - 12:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Thu May 28, 2026 00:44:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
428121220,3sleep00-21swapper/019:05:240
181692950,0sleep20-21swapper/200:32:592
145152890,0sleep214516-21sshd23:49:532
236462700,1sleep228-21rcuc/222:33:282
112662630,1sleep111264-21sshd23:03:521
298932610,1sleep329891-21sshd21:28:263
288392600,0sleep30-21swapper/322:22:263
323062580,1sleep332299-21bash21:31:273
368425621,9sleep30-21swapper/319:05:203
301932560,1sleep130177-21sshd23:59:491
228832560,0sleep31734-21runrttasks22:10:253
220692560,1sleep00-21swapper/022:41:550
71482550,1sleep01734-21runrttasks22:00:290
508025421,15sleep10-21swapper/119:08:591
264112540,0sleep30-21swapper/300:08:003
315672530,1sleep331549-21sshd22:05:293
28282530,1sleep119-21rcuc/122:25:501
238652530,0sleep30-21swapper/323:36:203
21572520,1sleep22152-21sshd22:57:202
202552520,0sleep20-21swapper/221:44:402
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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