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2026-05-10 - 09:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Sun May 10, 2026 00:44:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
48512950,1sleep04850-21sshd21:13:090
305422920,2sleep32568599cyclictest22:34:583
152972910,1sleep215294-21sshd00:38:322
28172790,1sleep22568499cyclictest22:57:552
64602630,0sleep00-21swapper/022:10:110
195362620,1sleep019534-21bash21:28:400
309422590,1sleep21734-21runrttasks23:57:092
30652580,0sleep30-21swapper/321:38:363
156272580,0sleep015630-21bash23:21:420
321472570,1sleep10-21swapper/123:20:191
33892560,0sleep30-21swapper/321:21:303
207872550,1sleep320766-21sshd21:28:483
278092540,2sleep12568399cyclictest00:14:031
83492530,0sleep00-21swapper/000:29:240
55372530,0sleep10-21swapper/100:29:091
2464325331,18sleep20-21swapper/219:06:072
52422520,0sleep20-21swapper/222:26:592
266252520,1sleep0328-21diskmemload23:02:510
137622520,0sleep30-21swapper/323:35:393
322392510,1sleep332222-21sshd22:35:063
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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