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2026-03-21 - 05:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Sat Mar 21, 2026 00:44:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20562920,0sleep121-21ksoftirqd/100:35:221
92262690,0sleep10-21swapper/100:30:171
149132660,0sleep339-21ksoftirqd/300:36:323
212322600,2sleep23017499cyclictest21:31:342
306022590,0sleep20-21swapper/222:01:262
271742590,1sleep227155-21sshd22:21:272
269722580,0sleep31734-21runrttasks21:46:373
96022570,1sleep38-21rcu_preempt23:49:523
256132570,1sleep225615-21bash23:57:002
16952570,0sleep00-21swapper/000:06:290
327442560,0sleep24881-21diskmemload00:29:332
25132550,0sleep00-21swapper/023:25:490
237562550,0sleep00-21swapper/022:00:480
175232550,0sleep00-21swapper/021:42:540
32572540,1sleep33238-21sshd00:03:473
304062540,1sleep337-21rcuc/322:10:133
280822540,0sleep20-21swapper/223:19:312
216952540,1sleep31734-21runrttasks00:34:203
195692540,0sleep00-21swapper/022:38:100
2976125331,8sleep20-21swapper/219:09:162
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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