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2026-04-11 - 14:21
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Sat Apr 11, 2026 00:44:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
404421030,0sleep20-21swapper/221:33:002
2454121000,1sleep30-21swapper/321:40:263
16502940,1sleep02740499cyclictest22:58:430
224482930,0sleep20-21swapper/200:06:232
128662900,0sleep312844-21sshd22:31:033
206652820,0sleep01508-21nfsd22:11:400
2526526423,27sleep30-21swapper/319:05:173
92022610,0sleep339-21ksoftirqd/322:45:093
43552590,1sleep21734-21runrttasks00:24:592
292162590,0sleep337-21rcuc/300:38:383
107402580,0sleep20-21swapper/223:19:332
296082570,0sleep20-21swapper/223:41:112
228662570,1sleep122868-21sshd00:12:121
138642570,1sleep228-21rcuc/223:28:212
251632560,1sleep31734-21runrttasks20:53:033
11632540,0sleep30-21swapper/321:18:263
3642530,1sleep30-21swapper/300:07:213
320202530,0sleep332006-21sshd21:12:333
30342530,0sleep33033-21sshd00:19:073
118852530,0sleep1201ktimersoftd/121:16:281
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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