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2026-04-20 - 02:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Mon Apr 20, 2026 00:44:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
210902940,1sleep30-21swapper/321:59:363
82442870,0sleep00-21swapper/022:13:110
1835226225,9sleep20-21swapper/219:05:562
180262610,0sleep20-21swapper/221:56:142
191872600,1sleep228-21rcuc/222:08:162
220342590,1sleep20-21swapper/223:16:392
311782580,1sleep20-21swapper/223:05:332
110302580,0sleep20-21swapper/200:21:102
284972570,1sleep228486-21sshd23:29:132
139832570,1sleep013972-21sshd23:18:580
294882560,1sleep229476-21sshd23:59:062
223682560,1sleep022366-21sshd21:41:550
262432550,0sleep1201ktimersoftd/122:26:331
177552550,1sleep117754-21sshd23:13:221
177552550,1sleep117754-21sshd23:13:221
142712550,1sleep314270-21bash22:16:393
45462540,1sleep14529-21sshd00:20:321
31792540,1sleep119-21rcuc/122:30:221
115192540,1sleep20-21swapper/222:01:352
299562530,1sleep329954-21bash23:05:263
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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