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2025-07-19 - 10:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Sat Jul 19, 2025 00:44:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
205582810,0sleep00-21swapper/021:20:430
110902610,1sleep111091-21sshd22:34:111
82242590,0sleep3381ktimersoftd/323:48:253
155332590,6sleep121-21ksoftirqd/123:43:061
321022570,1sleep132095-21sshd00:12:551
33872560,1sleep339-21ksoftirqd/300:20:143
78222550,0sleep30-21swapper/322:36:503
96562540,1sleep30-21swapper/323:30:343
161032540,0sleep20-21swapper/200:11:072
72572530,0sleep30-21swapper/322:33:493
11122530,1sleep01099-21sshd23:15:010
12612520,0sleep11260-21bash23:03:041
126032520,0sleep30-21swapper/323:21:573
79612510,0sleep00-21swapper/021:43:230
301422510,0sleep30-21swapper/321:33:323
690625022,9sleep30-21swapper/319:08:373
279932500,0sleep00-21swapper/023:32:190
153222500,1sleep215314-21sshd22:07:442
122192500,0sleep11722-21runrttasks21:40:421
694324923,8sleep00-21swapper/019:09:060
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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