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2026-05-09 - 22:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Sat May 09, 2026 12:44:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
97242920,0sleep30-21swapper/309:20:173
289272910,0sleep328909-21sshd10:47:523
56882820,0sleep00-21swapper/010:14:230
1207526722,9sleep10-21swapper/107:05:191
1383326023,19sleep00-21swapper/007:09:390
110582600,0sleep30-21swapper/311:11:563
224732590,1sleep322456-21sshd11:01:303
222572590,1sleep228-21rcuc/210:33:012
151842580,0sleep3381ktimersoftd/309:55:073
128692580,0sleep20-21swapper/210:35:052
43502570,1sleep34324-21sshd12:02:533
215392570,1sleep121540-21sshd11:30:091
154822570,0sleep11734-21runrttasks11:23:521
80222560,2sleep010-21rcuc/011:03:070
308592560,1sleep10-21swapper/112:08:021
123752560,0sleep10-21swapper/109:43:241
252302550,0sleep025229-21bash11:50:230
246072550,0sleep00-21swapper/012:19:000
241432550,2sleep21416699cyclictest11:15:552
147982550,1sleep31734-21runrttasks11:15:123
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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