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2026-05-08 - 10:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Fri May 08, 2026 00:44:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
215862970,1sleep321583-21bash23:08:363
91282950,1sleep01734-21runrttasks23:07:300
46212900,0sleep34620-21sshd00:35:293
1900926124,18sleep10-21swapper/119:06:021
34822600,1sleep13486-21unixbench_multi21:30:261
201512590,0sleep220148-21sshd00:28:232
319542560,0sleep10-21swapper/122:26:471
39362550,0sleep30-21swapper/321:58:533
207512550,1sleep38-21rcu_preempt21:43:233
98192540,1sleep09803-21sshd23:10:210
295082540,0sleep129500-21sshd21:49:491
60212530,1sleep00-21swapper/023:32:490
18802530,0sleep31879-21sshd23:18:133
28702520,1sleep22869-21sshd00:38:172
250262520,1sleep020048-21cyclictest22:37:320
205662520,1sleep320549-21sshd23:31:113
203882520,0sleep30-21swapper/323:59:493
325642510,0sleep00-21swapper/021:24:360
154372510,0sleep30-21swapper/322:22:333
1930225028,18sleep20-21swapper/219:07:292
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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