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2026-09-08 - 14:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Tue Sep 08, 2026 00:44:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
982421060,0sleep09825-21sshd00:17:080
305332960,0sleep230521-21sshd22:00:572
305332960,0sleep230521-21sshd22:00:572
155232880,0sleep00-21swapper/022:57:040
187612630,0sleep20-21swapper/223:51:582
300192610,1sleep330013-21cp00:10:183
300192610,1sleep330013-21cp00:10:183
197782600,1sleep119777-21bash23:57:511
155002600,0sleep00-21swapper/000:11:520
155002600,0sleep00-21swapper/000:11:510
16672580,2sleep228-21rcuc/221:32:332
49122570,0sleep24895-21sshd21:50:072
293092570,1sleep20-21swapper/222:20:572
96362560,1sleep29625-21sshd22:13:322
96362560,1sleep29625-21sshd22:13:322
1217425633,9sleep20-21swapper/219:08:392
45002540,0sleep00-21swapper/023:27:440
298122540,2sleep01253399cyclictest22:41:060
201882540,1sleep21866-21runrttasks23:40:322
73152530,1sleep27302-21sshd00:31:212
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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