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2026-04-06 - 00:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackaslot0.osadl.org (updated Sun Apr 05, 2026 12:44:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
173302910,2sleep175999cyclictest09:33:371
3245726326,18sleep20-21swapper/207:07:292
105872620,0sleep10-21swapper/111:13:081
285062590,0sleep20-21swapper/210:11:442
279212590,0sleep327916-21sshd11:03:143
136042590,1sleep213577-21sshd12:30:382
71952570,1sleep07951-21diskmemload12:27:160
288612570,0sleep20-21swapper/212:29:142
60832560,1sleep06082-21seq09:44:060
3238725623,18sleep10-21swapper/107:07:071
76982550,1sleep10-21swapper/110:12:471
87042530,1sleep28687-21sshd10:15:412
27712530,0sleep32769-21sshd10:00:513
3025725230,18sleep00-21swapper/007:05:090
146472520,1sleep30-21swapper/310:56:173
52812510,0sleep20-21swapper/209:55:212
150672510,1sleep015063-21cp09:10:290
69162500,0sleep16917-21bash09:46:591
126632500,0sleep112661-21sshd10:59:021
3215324825,19sleep30-21swapper/307:05:563
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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