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2026-04-09 - 20:13
OSADL QA Farm

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of system in rack #a, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackaslot4.osadl.org (updated Thu Apr 09, 2026 12:43:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)		T*(,W**)
latency
(µs)		CmdPIDPrioCmd
404672399307,19cyclictest157-21kworker/2:1-events_freezable2
404672399286,18cyclictest157-21kworker/2:1-events_freezable2
404672399284,19cyclictest157-21kworker/2:1-events_freezable2
404672399264,16cyclictest157-21kworker/2:1-events_freezable2
404672399254,15cyclictest157-21kworker/2:1-events_freezable2
404672399251,18cyclictest157-21kworker/2:1-events_freezable2
404672399251,18cyclictest157-21kworker/2:1-events_freezable2
404672399244,16cyclictest157-21kworker/2:1-events_freezable2
404672399244,15cyclictest157-21kworker/2:1-events_freezable2
404672399244,14cyclictest157-21kworker/2:1-events_freezable2
404672399243,14cyclictest157-21kworker/2:1-events_freezable2
404672399241,18cyclictest157-21kworker/2:1-events_freezable2
404672399235,14cyclictest157-21kworker/2:1-events_freezable2
404672399234,15cyclictest157-21kworker/2:1-events_freezable2
404672399234,14cyclictest157-21kworker/2:1-events_freezable2
404672399233,15cyclictest157-21kworker/2:1-events_freezable2
404672399233,14cyclictest157-21kworker/2:1-events_freezable2
404672399233,14cyclictest157-21kworker/2:1-events_freezable2
404672399233,13cyclictest157-21kworker/2:1-events_freezable2
404672399233,13cyclictest157-21kworker/2:1-events_freezable2
404672399232,17cyclictest157-21kworker/2:1-events_freezable2
404672399224,13cyclictest157-21kworker/2:1-events_freezable2
404672399223,14cyclictest157-21kworker/2:1-events_freezable2
404672399223,14cyclictest157-21kworker/2:1-events_freezable2
404672399223,12cyclictest157-21kworker/2:1-events_freezable2
404672399222,14cyclictest157-21kworker/2:1-events_freezable2
404672399222,14cyclictest157-21kworker/2:1-events_freezable2
404672399222,14cyclictest157-21kworker/2:1-events_freezable2
404672399222,13cyclictest157-21kworker/2:1-events_freezable2
404672399221,17cyclictest157-21kworker/2:1-events_freezable2
404672399221,15cyclictest157-21kworker/2:1-events_freezable2
404672399221,14cyclictest157-21kworker/2:1-events_freezable2
404672399214,14cyclictest157-21kworker/2:1-events_freezable2
404672399214,14cyclictest157-21kworker/2:1-events_freezable2
404672399213,14cyclictest157-21kworker/2:1-events_freezable2
404672399213,14cyclictest157-21kworker/2:1-events_freezable2
404672399213,13cyclictest157-21kworker/2:1-events_freezable2
404672399213,13cyclictest157-21kworker/2:1-events_freezable2
404672399213,12cyclictest157-21kworker/2:1-events_freezable2
404672399212,13cyclictest157-21kworker/2:1-events_freezable2
404672399211,14cyclictest157-21kworker/2:1-events_freezable2
404672399211,13cyclictest157-21kworker/2:1-events_freezable2
404672399211,13cyclictest157-21kworker/2:1-events_freezable2
404672399211,13cyclictest157-21kworker/2:1-events_freezable2
404672399210,14cyclictest157-21kworker/2:1-events_freezable2
404672399203,14cyclictest157-21kworker/2:1-events_freezable2
404672399201,14cyclictest157-21kworker/2:1-events_freezable2
404672399201,13cyclictest157-21kworker/2:1-events_freezable2
404672399201,13cyclictest157-21kworker/2:1-events_freezable2
404672399201,12cyclictest157-21kworker/2:1-events_freezable2
404672399191,14cyclictest157-21kworker/2:1-events_freezable2
404672399191,14cyclictest157-21kworker/2:1-events_freezable2
404672399191,12cyclictest157-21kworker/2:1-events_freezable2
404672399191,12cyclictest157-21kworker/2:1-events_freezable2
404672399190,14cyclictest157-21kworker/2:1-events_freezable2
404672399190,12cyclictest157-21kworker/2:1-events_freezable2
404672399190,12cyclictest157-21kworker/2:1-events_freezable2
404672399181,12cyclictest157-21kworker/2:1-events_freezable2
404672399181,12cyclictest157-21kworker/2:1-events_freezable2
404672399181,11cyclictest157-21kworker/2:1-events_freezable2
404672399181,11cyclictest157-21kworker/2:1-events_freezable2
404672399172,11cyclictest157-21kworker/2:1-events_freezable2
404672399171,11cyclictest157-21kworker/2:1-events_freezable2
404672399161,14cyclictest157-21kworker/2:1-events_freezable2
404672399161,11cyclictest157-21kworker/2:1-events_freezable2
404672399161,10cyclictest157-21kworker/2:1-events_freezable2
40467239951,2cyclictest0-21swapper/22
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*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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