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2026-03-21 - 13:45
OSADL QA Farm

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of system in rack #a, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackaslot4.osadl.org (updated Sat Mar 21, 2026 00:43:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)		T*(,W**)
latency
(µs)		CmdPIDPrioCmd
256047699256,15cyclictest157-21kworker/2:1-events_freezable2
256047699256,14cyclictest157-21kworker/2:1-events_freezable2
256047699255,14cyclictest157-21kworker/2:1-events_freezable2
256047699245,14cyclictest157-21kworker/2:1-events_freezable2
256047699235,14cyclictest157-21kworker/2:1-events_freezable2
256047699235,14cyclictest157-21kworker/2:1-events_freezable2
256047699235,14cyclictest157-21kworker/2:1-events_freezable2
256047699235,14cyclictest157-21kworker/2:1-events_freezable2
256047699235,13cyclictest157-21kworker/2:1-events_freezable2
256047699235,13cyclictest157-21kworker/2:1-events_freezable2
256047699235,13cyclictest157-21kworker/2:1-events_freezable2
256047699225,13cyclictest157-21kworker/2:1-events_freezable2
256047699225,13cyclictest157-21kworker/2:1-events_freezable2
256047699225,12cyclictest157-21kworker/2:1-events_freezable2
256047699215,12cyclictest157-21kworker/2:1-events_freezable2
256047699215,12cyclictest157-21kworker/2:1-events_freezable2
256047699214,13cyclictest157-21kworker/2:1-events_freezable2
256047699214,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699205,11cyclictest157-21kworker/2:1-events_freezable2
256047699204,11cyclictest157-21kworker/2:1-events_freezable2
256047699204,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,11cyclictest157-21kworker/2:1-events_freezable2
256047699194,10cyclictest157-21kworker/2:1-events_freezable2
256047699194,10cyclictest157-21kworker/2:1-events_freezable2
25604769985,2cyclictest361rcuc/22
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*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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