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2026-04-04 - 09:46
OSADL QA Farm

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of system in rack #a, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackaslot4.osadl.org (updated Sat Apr 04, 2026 00:43:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)		T*(,W**)
latency
(µs)		CmdPIDPrioCmd
9016899314,18cyclictest157-21kworker/2:1-events_freezable2
9016899313,20cyclictest157-21kworker/2:1-events_freezable2
9016899294,15cyclictest157-21kworker/2:1-events_freezable2
9016899292,18cyclictest157-21kworker/2:1-events_freezable2
9016899292,17cyclictest157-21kworker/2:1-events_freezable2
9016899291,18cyclictest157-21kworker/2:1-events_freezable2
9016899290,19cyclictest157-21kworker/2:1-events_freezable2
9016899285,16cyclictest157-21kworker/2:1-events_freezable2
9016899285,14cyclictest157-21kworker/2:1-events_freezable2
9016899284,14cyclictest157-21kworker/2:1-events_freezable2
9016899283,14cyclictest157-21kworker/2:1-events_freezable2
9016899282,17cyclictest157-21kworker/2:1-events_freezable2
9016899281,17cyclictest157-21kworker/2:1-events_freezable2
9016899281,17cyclictest157-21kworker/2:1-events_freezable2
9016899275,15cyclictest157-21kworker/2:1-events_freezable2
9016899274,15cyclictest157-21kworker/2:1-events_freezable2
9016899274,14cyclictest157-21kworker/2:1-events_freezable2
9016899273,17cyclictest157-21kworker/2:1-events_freezable2
9016899273,15cyclictest157-21kworker/2:1-events_freezable2
9016899273,14cyclictest157-21kworker/2:1-events_freezable2
9016899273,14cyclictest157-21kworker/2:1-events_freezable2
9016899273,14cyclictest157-21kworker/2:1-events_freezable2
9016899273,14cyclictest157-21kworker/2:1-events_freezable2
9016899271,18cyclictest157-21kworker/2:1-events_freezable2
9016899271,17cyclictest157-21kworker/2:1-events_freezable2
9016899271,17cyclictest157-21kworker/2:1-events_freezable2
9016899263,14cyclictest157-21kworker/2:1-events_freezable2
9016899263,14cyclictest157-21kworker/2:1-events_freezable2
9016899263,14cyclictest157-21kworker/2:1-events_freezable2
9016899263,13cyclictest157-21kworker/2:1-events_freezable2
9016899262,14cyclictest157-21kworker/2:1-events_freezable2
9016899262,14cyclictest157-21kworker/2:1-events_freezable2
9016899256,13cyclictest157-21kworker/2:1-events_freezable2
9016899255,14cyclictest157-21kworker/2:1-events_freezable2
9016899255,14cyclictest157-21kworker/2:1-events_freezable2
9016899235,12cyclictest157-21kworker/2:1-events_freezable2
9016899234,14cyclictest157-21kworker/2:1-events_freezable2
9016899234,12cyclictest157-21kworker/2:1-events_freezable2
9016899224,14cyclictest157-21kworker/2:1-events_freezable2
9016899224,13cyclictest157-21kworker/2:1-events_freezable2
9016899224,13cyclictest157-21kworker/2:1-events_freezable2
9016899224,12cyclictest157-21kworker/2:1-events_freezable2
9016899223,13cyclictest157-21kworker/2:1-events_freezable2
9016899222,14cyclictest157-21kworker/2:1-events_freezable2
9016899222,14cyclictest157-21kworker/2:1-events_freezable2
9016899222,14cyclictest157-21kworker/2:1-events_freezable2
9016899213,13cyclictest157-21kworker/2:1-events_freezable2
9016899213,13cyclictest157-21kworker/2:1-events_freezable2
9016899211,16cyclictest157-21kworker/2:1-events_freezable2
9016899211,14cyclictest157-21kworker/2:1-events_freezable2
9016899211,14cyclictest157-21kworker/2:1-events_freezable2
9016899202,13cyclictest157-21kworker/2:1-events_freezable2
9016899202,13cyclictest157-21kworker/2:1-events_freezable2
9016899202,13cyclictest157-21kworker/2:1-events_freezable2
9016899195,13cyclictest157-21kworker/2:1-events_freezable2
9016899193,11cyclictest157-21kworker/2:1-events_freezable2
9016899193,11cyclictest157-21kworker/2:1-events_freezable2
9016899193,11cyclictest157-21kworker/2:1-events_freezable2
9016899191,14cyclictest157-21kworker/2:1-events_freezable2
9016899191,13cyclictest157-21kworker/2:1-events_freezable2
9016899191,11cyclictest157-21kworker/2:1-events_freezable2
9016899182,12cyclictest157-21kworker/2:1-events_freezable2
9016899182,11cyclictest157-21kworker/2:1-events_freezable2
9016899181,11cyclictest157-21kworker/2:1-events_freezable2
9016899170,13cyclictest157-21kworker/2:1-events_freezable2
9016899163,12cyclictest157-21kworker/2:1-events_freezable2
901689961,2cyclictest0-21swapper/22
none7
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*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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