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2026-03-30 - 15:55
OSADL QA Farm

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of system in rack #a, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackaslot4.osadl.org (updated Mon Mar 30, 2026 12:43:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)		T*(,W**)
latency
(µs)		CmdPIDPrioCmd
363350399355,21cyclictest157-21kworker/2:1-events_freezable2
363350399347,18cyclictest157-21kworker/2:1-events_freezable2
363350399343,20cyclictest157-21kworker/2:1-events_freezable2
363350399337,18cyclictest157-21kworker/2:1-events_freezable2
363350399336,19cyclictest157-21kworker/2:1-events_freezable2
363350399334,19cyclictest157-21kworker/2:1-events_freezable2
363350399326,18cyclictest157-21kworker/2:1-events_freezable2
363350399326,17cyclictest157-21kworker/2:1-events_freezable2
363350399326,17cyclictest157-21kworker/2:1-events_freezable2
363350399325,18cyclictest157-21kworker/2:1-events_freezable2
363350399324,18cyclictest157-21kworker/2:1-events_freezable2
363350399316,17cyclictest157-21kworker/2:1-events_freezable2
363350399316,17cyclictest157-21kworker/2:1-events_freezable2
363350399315,17cyclictest157-21kworker/2:1-events_freezable2
363350399313,18cyclictest157-21kworker/2:1-events_freezable2
363350399313,18cyclictest157-21kworker/2:1-events_freezable2
363350399313,18cyclictest157-21kworker/2:1-events_freezable2
363350399306,17cyclictest157-21kworker/2:1-events_freezable2
363350399306,16cyclictest157-21kworker/2:1-events_freezable2
363350399306,16cyclictest157-21kworker/2:1-events_freezable2
363350399305,17cyclictest157-21kworker/2:1-events_freezable2
363350399305,17cyclictest157-21kworker/2:1-events_freezable2
363350399305,16cyclictest157-21kworker/2:1-events_freezable2
363350399304,17cyclictest157-21kworker/2:1-events_freezable2
363350399303,19cyclictest157-21kworker/2:1-events_freezable2
363350399303,18cyclictest157-21kworker/2:1-events_freezable2
363350399302,18cyclictest157-21kworker/2:1-events_freezable2
363350399295,16cyclictest157-21kworker/2:1-events_freezable2
363350399294,17cyclictest157-21kworker/2:1-events_freezable2
363350399294,17cyclictest157-21kworker/2:1-events_freezable2
363350399294,16cyclictest157-21kworker/2:1-events_freezable2
363350399294,16cyclictest157-21kworker/2:1-events_freezable2
363350399293,18cyclictest157-21kworker/2:1-events_freezable2
363350399293,17cyclictest157-21kworker/2:1-events_freezable2
363350399293,17cyclictest157-21kworker/2:1-events_freezable2
363350399293,17cyclictest157-21kworker/2:1-events_freezable2
363350399293,17cyclictest157-21kworker/2:1-events_freezable2
363350399293,17cyclictest157-21kworker/2:1-events_freezable2
363350399293,16cyclictest157-21kworker/2:1-events_freezable2
363350399292,18cyclictest157-21kworker/2:1-events_freezable2
363350399285,15cyclictest157-21kworker/2:1-events_freezable2
363350399283,17cyclictest157-21kworker/2:1-events_freezable2
363350399283,17cyclictest157-21kworker/2:1-events_freezable2
363350399283,16cyclictest157-21kworker/2:1-events_freezable2
363350399282,18cyclictest157-21kworker/2:1-events_freezable2
363350399282,17cyclictest157-21kworker/2:1-events_freezable2
363350399282,17cyclictest157-21kworker/2:1-events_freezable2
363350399281,18cyclictest157-21kworker/2:1-events_freezable2
363350399281,18cyclictest157-21kworker/2:1-events_freezable2
363350399274,13cyclictest157-21kworker/2:1-events_freezable2
363350399272,17cyclictest157-21kworker/2:1-events_freezable2
363350399272,16cyclictest157-21kworker/2:1-events_freezable2
363350399272,16cyclictest157-21kworker/2:1-events_freezable2
363350399272,15cyclictest157-21kworker/2:1-events_freezable2
363350399271,17cyclictest157-21kworker/2:1-events_freezable2
363350399264,14cyclictest157-21kworker/2:1-events_freezable2
363350399262,16cyclictest157-21kworker/2:1-events_freezable2
363350399260,18cyclictest157-21kworker/2:1-events_freezable2
363350399260,17cyclictest157-21kworker/2:1-events_freezable2
363350399223,15cyclictest157-21kworker/2:1-events_freezable2
363350399221,16cyclictest157-21kworker/2:1-events_freezable2
363350399212,14cyclictest157-21kworker/2:1-events_freezable2
363350399211,15cyclictest157-21kworker/2:1-events_freezable2
363350399211,14cyclictest157-21kworker/2:1-events_freezable2
363350399202,14cyclictest157-21kworker/2:1-events_freezable2
363350399201,15cyclictest157-21kworker/2:1-events_freezable2
36335089972,3cyclictest0-21swapper/22
none7
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*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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