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2026-03-08 - 10:51
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackaslot6.osadl.org (updated Sun Mar 08, 2026 00:44:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
200301499406,16cyclictest0-21swapper/00
200301499404,21cyclictest0-21swapper/00
200301999381,29cyclictest0-21swapper/55
200301999381,18cyclictest0-21swapper/55
200301499381,33cyclictest0-21swapper/00
200301899361,31cyclictest2092002-21apt-config4
200301899361,31cyclictest2092002-21apt-config4
200302099351,24cyclictest0-21swapper/66
2003019993511,14cyclictest1977639-21kworker/u32:2+rpciod5
200301899354,17cyclictest22650irq/129-46000000.ethernet-tx34
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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